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參數(shù)資料
| 型號(hào)： | HI5628/6INZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT 60MSPS DUAL 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 330mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 4 電流，單極 |
| 采樣率（每秒）： | 60M |
4
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AVDD to ACOM. . . . . . . . . . . . . . . . . . +5.5V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D7-D0, CLK, SLEEP). . . . . . . . DVDD + 0.3V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . .
±50A
Reference Input Voltage Range . . . . . . . . . . . . . . . . . . AVDD + 0.3V
Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Resistance (Typical, Note 1)
θJA(oC/W)
LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AVDD = +5V, DVDD = +5V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values. Data given
is per channel except for ‘Power Supply Characteristics.’
PARAMETER
TEST CONDITIONS
HI5628IN
TA = -40oC TO 85oC
UNITS
MIN
TYP
MAX
SYSTEM PERFORMANCE (Per Channel)
Resolution
8
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 7)
-0.5
±0.25
+0.5
LSB
Differential Linearity Error, DNL
(Note 7)
-0.5
±0.25
+0.5
LSB
Offset Error, IOS
(Note 7)
-0.025
-
+0.025
% FSR
Offset Drift Coefficient
(Note 7)
-
0.1
-
ppm
FSR/oC
Full Scale Gain Error, FSE
With External Reference (Notes 2, 7)
-10
±2
+10
% FSR
With Internal Reference (Notes 2, 7)
-10
±1
+10
% FSR
Full Scale Gain Drifta
With External Reference (Note 7)
-
±50
-
ppm
FSR/oC
With Internal Reference (Note 7)
-
±100
-
ppm
FSR/oC
Gain Matching Between Channels
-0.5
0.1
0.5
dB
I/Q Channel Isolation
FOUT = 10MHz
-
80
-
dB
Output Voltage Compliance Range
(Note 3)
-0.3
-
1.25
V
Full Scale Output Current, IFS
2
-
20
mA
DYNAMIC CHARACTERISTICS (Per Channel)
Clock Rate, fCLK
(Note 3, 9)
125
-
MHz
Output Settling Time, (tSETT)
0.8% (
±1 LSB, equivalent to 7 Bits) (Note 7)
-
5
-
ns
0.4% (
±1/2 LSB, equivalent to 8 Bits) (Note 7)
-
15
-
ns
Singlet Glitch Area (Peak Glitch)
RL = 25 (Note 7)
-
5
-
pVs
Output Rise Time
Full Scale Step
-
1.5
-
ns
Output Fall Time
Full Scale Step
-
1.5
-
ns
Output Capacitance
-
10
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/
√Hz
IOUTFS = 2mA
-
30
-
pA/
√Hz
HI5628
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