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參數(shù)資料
| 型號(hào)： | HI9P5701-5 |
| 廠商： | Intersil Corporation |
| 英文描述： | 6-Bit, 30MSPS, Flash A/D Converter |
| 中文描述： | 6位，30MSPS，閃光的A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 151K |
| 代理商： | HI9P5701-5 |
11
Glossary of Terms
Aperture Delay -
is The time delay between the external
sample command (the rising edge of the clock) and the time
at which the signal is actually sampled. This delay is due to
internal clock path propagation delays.
Aperture Jitter, t
AJ
-
This is the RMS variation in the
aperture delay due to variation of internal
φ
1 and
φ
2 clock
path delays and variation between the individual comparator
switching times.
Differential Linearity Error, DNL -
The differential linearity
error is the difference in LSBs between the spacing of the
measured midpoint of adjacent codes and the spacing of
ideal midpoints of adjacent codes. The ideal spacing of each
midpoint is 1 LSB. The range of values possible is from
-1 LSB (which implies a missing code) to greater than
+1 LSB.
Full Power Input Bandwidth -
Full power bandwidth is the
frequency at which the amplitude of the fundamental of the
digital output word has decreased 3dB below the amplitude
of an input sine wave. The input sine wave has a peak-to-
peak amplitude equal to the reference voltage. The
bandwidth given is measured at the specified sampling
frequency.
Full Scale Error, FSE -
is The difference between the actual
input voltage of the 63 to 64 code transition and the ideal
value of V
REF
+ - 1.5 LSB. This error is expressed in LSBs.
Integral Linearity Error, INL -
The integral linearity error is
the difference in LSBs between the measured code centers
and the ideal code centers. The ideal code centers are
calculated using a best fit line through the converter’s
transfer function.
LSB -
Least Significant Bit = (V
REF
+ - V
REF
-)/64. All
HI-5701 specifications are given for a 62.5mV LSB size
V
REF
+ = 4V, V
REF
- = 0V.
Offset Error, V
OS
-
Offset error is the difference between
the actual input voltage of the 0 to 1 code transition and the
ideal value of V
REF
- + 0.5 LSB. V
OS
error is expressed in
LSBs.
Power Supply Rejection Ratio, PSRR -
Is expressed in
LSBs and is the maximum shift in code transition points due
to a power supply voltage shift. This is measured at the 0 to
1 code transition point and the 62 to 63 code transition point
with a power supply voltage shift from the nominal value of
5.0V.
Signal to Noise Ratio, SNR -
SNR is the ratio in dB of the
RMS signal to RMS noise at specified input and sampling
frequencies.
Signal to Noise and Distortion Ratio, SINAD -
Is the ratio
in dB of the RMS signal to the RMS sum of the noise and
harmonic distortion at specified input and sampling
frequencies.
Total Harmonic Distortion, THD -
Is the ratio in dBc of the
RMS sum of the first five harmonic components to the RMS
signal for a specified input and sampling frequency
1
/
2
FS
1.9688
32
0
1
0
0
0
0
0
1
/
4
FS
0.9688
16
0
0
1
0
0
0
0
1 LSB
0.0313
1
0
0
0
0
0
0
1
Zero
0
0
0
0
0
0
0
0
0
The voltages listed above represent the ideal transition of each output code shown as a function of the reference voltage.
TABLE 4. OUTPUT CODE TABLE (Continued)
CODE
DESCRIPTION
INPUT VOLTAGE
V
REF
+ = 4V
V
REF
- = 0V
(V)
DECIMAL
COUNT
BINARY OUTPUT CODE
MSB
LSB
OVF
D5
D4
D3
D2
D1
D0
HI-5701
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI9P5701B-9 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:6-Bit, 30MSPS, Flash A/D Converter |
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