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參數(shù)資料
| 型號： | HIP6304EVAL1 |
| 廠商： | Intersil Corporation |
| 英文描述： | Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| 中文描述： | 微處理器核心電壓調(diào)節(jié)器的多相降壓PWM控制器 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 176K |
| 代理商： | HIP6304EVAL1 |
11
Example: Using the previously given conditions, and
For I
LT
= 50A,
n = 2
Then I
SAMPLE
= 25.49A
As discussed previously, the voltage drop across each Q2
transistor at the point in time when current is sampled is
r
DSON
(Q2) x I
SAMPLE
. The voltage at Q2’s drain, the
PHASE node, is applied through the R
ISEN
resistor to the
HIP6304 ISEN pin. This pin is held at virtual ground, so the
current into ISEN is:
I
SENSE
= I
SAMPLE
x r
DS(ON)
(Q2) / R
ISEN
.
R
Isen
= I
SAMPLE
x r
DS(ON)
(Q2) / 50
μ
A
Example: From the previous conditions,
where I
LT
I
SAMPLE
r
DS(ON)
(Q2)
Then: R
ISEN
I
CURRENT TRIP
Short circuit I
LT
= 50A,
= 25.49A,
= 4m
= 2.04K and
= 165%
= 82.5A.
Channel Frequency Oscillator
The channel oscillator frequency is set by placing a resistor,
R
T
, to ground from the FS/DIS pin. Figure 10 is a curve
showing the relationship between frequency, F
SW,
and
resistor R
T
. To avoid pickup by the FS/DIS pin, it is important
to place this resistor next to the pin. If this pin is also used to
disable the converter, it is also important to locate the pull-
down device next to this pin.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit
and lead to device over-voltage stress. Careful component
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turnoff
transition of the upper PWM MOSFET. Prior to turnoff, the
upper MOSFET was carrying channel current. During the
turnoff, current stops flowing in the upper MOSFET and is
picked up by the lower MOSFET. Any inductance in the
switched current path generates a large voltage spike during
the switching interval. Careful component selection, tight
layout of the critical components, and short, wide circuit
traces minimize the magnitude of voltage spikes. Contact
Intersil
for evaluation board drawings of the component
placement and printed circuit board.
There are two sets of critical components in a DC-DC
converter using a HIP6304 controller and a HIP6601 gate
driver. The power components are the most critical because
they switch large amounts of energy. Next are small signal
components that connect to sensitive nodes or supply
critical bypassing current and signal coupling.
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors, C
IN
,
and the power switches. Locate the output inductors and
output capacitors between the MOSFETs and the load.
Locate the gate driver close to the MOSFETs.
The critical small components include the bypass capacitors
for VCC and PVCC on the gate driver ICs. Locate the
bypass capacitor, C
BP
, for the HIP6304 controller close to
the device. It is especially important to locate the resistors
associated with the input to the amplifiers close to their
respective pins, since they represent the input to feedback
amplifiers. Resistor R
T
, that sets the oscillator frequency
should also be located next to the associated pin. It is
especially important to place the R
SEN
resistor(s) at the
respective terminals of the HIP6304.
A multi-layer printed circuit board is recommended. Figure 11
shows the connections of the critical components for one
output channel of the converter. Note that capacitors C
IN
and
C
OUT
could each represent numerous physical capacitors.
Dedicate one solid layer, usually the middle layer of the PC
board, for a ground plane and make all critical component
ground connections with vias to this layer. Dedicate another
solid layer as a power plane and break this plane into smaller
islands of common voltage levels. Keep the metal runs from
the PHASE terminal to inductor L
O1
short. The power plane
should support the input power and output power nodes. Use
copper filled polygons on the top and bottom circuit layers for
50
100
10
20
CHANNEL OSCILLATOR FREQUENCY, F
SW
(kHz)
200
500 1,000
5,000 10,000
2,000
1
2
5
10
20
50
100
200
500
1,000
R
T
(
)
FIGURE 10. RESISTANCE R
T
vs FREQUENCY
HIP6304
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HIP6500B | Multiple Linear Power Controller with ACPI Control Interface |
| HIP6500BCB | Multiple Linear Power Controller with ACPI Control Interface |
| HIP6500BEVAL1 | Multiple Linear Power Controller with ACPI Control Interface |
| HIP6500 | Multiple Linear Power Controller with ACPI Control Interface |
| HIP6500CB | Multiple Linear Power Controller with ACPI Control Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP6311 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| HIP6311_04 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| HIP6311A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| HIP6311ACB | 功能描述:IC REG CTRLR BUCK PWM 20-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
| HIP6311ACB-T | 功能描述:IC REG CTRLR BUCK PWM 20-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
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