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參數(shù)資料
| 型號： | HM1-6508B883 |
| 廠商： | Intersil Corporation |
| 英文描述： | 1024 x 1 CMOS RAM |
| 中文描述： | 1024 × 1 CMOS存儲器 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 234K |
| 代理商： | HM1-6508B883 |
6-69
March 1997
HM-6508/883
1024 x 1 CMOS RAM
Features
This Circuit is Processed in Accordance to
MIL-STD-883 and is Fully Conformant Under the Provi-
sions of Paragraph 1.2.1.
Low Power Standby. . . . . . . . . . . . . . . . . . . . 50
μ
W Max
Low Power Operation . . . . . . . . . . . . . 20mW/MHz Max
Fast Access Time. . . . . . . . . . . . . . . . . . . . . .180ns Max
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . .2.0V Min
TTL Compatible Input/Output
High Output Drive - 2 TTL Loads
On-Chip Address Register
Description
The HM-6508/883 is a 1024 x 1 static CMOS RAM
fabricated using self-aligned silicon gate technology.
Synchronous circuit design techniques are employed to
achieve high performance and low power operation.
On chip latches are provided for address allowing efficient
interfacing with microprocessor systems. The data output
buffers can be forced to a high impedance state for use in
expanded memory arrays.
The HM-6508/883 is a fully static RAM and may be main-
tained in any state for an indefinite period of time. Data
retention supply voltage and supply current are guaranteed
over temperature.
Pinout
HM1-6508/883
(CERDIP)
TOP VIEW
Ordering Information
PACKAGE
TEMP. RANGE
-55
o
C to +125
o
C HM1-
180ns
250ns
PKG. NO.
CERDIP
6508B/883
HM1-
6508/883
F16.3
PIN
DESCRIPTION
A
Address Input
E
Chip Enable
W
Write Enable
D
Data Input
Q
Data Output
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
E
A0
A1
A2
A3
A4
GND
Q
VCC
W
A9
A8
A7
A6
A5
D
File Number
2985.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
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