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參數(shù)資料
| 型號： | HM514260CLTT-7 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 262,144-word x 16-bit Dynamic Random Access Memory |
| 中文描述： | 262,144字× 16位動態(tài)隨機存取存儲器 |
| 文件頁數(shù)： | 12/27頁 |
| 文件大?。?/td> | 260K |
| 代理商： | HM514260CLTT-7 |
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HM514260C, HM51S4260C Series
12
Self refresh Mode
HM51S4260C
-6/-6R
-7
-8
Parameter
RAS
pulse width (self refresh)
Symbol Min
Max
Min
Max
Min
Max
Unit Notes
t
RASS
100
—
100
—
100
—
μ
s
24, 25,
26
RAS
precharge time (self refresh)
CAS
hold time (self refresh)
Notes: 1. AC measurements assume t
T
= 5 ns.
2. Assumes that t
≤
t
(max) and t
≤
t
RAD
(max). If t
or t
is greater than the maximum
recommended value shown in this table, t
RAC
exceeds the value shown.
3. Measured with a load circuit equivalent to 2 TTL loads and 100 pF (HM51(S)4260C-6/7/8), 2 TTL
50 pF (HM51(S)4260C-6R).
4. Assumes that t
RCD
≥
t
RCD
(max) and t
RAD
≤
t
RAD
(max).
5. Assumes that t
RCD
≤
t
RCD
(max) and t
RAD
≥
t
RAD
(max).
6. t
(max) defines the time at which the output achieves the open circuit condition and is not
referred to output voltage levels.
7. V
(min) and V
(max) are reference levels for measuring timing of input signals. Also, transition
times are measured between V
IH
and V
IL
.
8. Operation with the t
(max) limit insures that t
(max) can be met, t
(max) is specified as a
reference point only, if t
is greater than the specified t
RCD
(max) limit, then access time is
controlled exclusively by t
CAC
.
9. Operation with the t
(max) limit insures that t
(max) can be met, t
(max) is specified as a
reference point only, if t
is greater than the specified t
RAD
(max) limit, then access time is
controlled exclusively by t
AA
.
10.t
, t
, t
and t
are not restrictive operating parameters. They are included in the data sheet
as electrical characteristics only: if t
≥
t
(min), the cycle is an early write cycle and the data out
pin will remain open circuit (high impedance) throughout the entire cycle; if t
≥
t
(min), t
≥
t
(min), t
≥
t
(min) and t
≥
t
(min), the cycle is a read-modify-write and the data output
will contain data read from the selected cell; if neither of the above sets of conditions is satisfied,
the condition of the data out (at access time) is indeterminate.
11.These parameters are referred to
CAS
leading edge in an early write cycle and to
WE
leading edge
in a delayed write or a read-modify-write cycle.
12.t
RASC
defines
RAS
pulse width in fast page mode cycles.
13.Access time is determined by the longest among t
AA
, t
CAC
and t
ACP
.
14.An initial pause of 100
μ
s is required after power up followed by a minimum of eight initialization
cycles (
RAS
-only refresh cycle or
CAS
-before-
RAS
refresh cycle). If the internal refresh counter is
used, a minimum of eight
CAS
-before-
RAS
refresh cycles is required.
15.In delayed write or read-modify-write cycles,
OE
must disable output buffer prior to applying data to
the device.
16.Either t
RCH
or t
RRH
must be satisfied for a read cycle.
17.When both
UCAS
and
LCAS
go low at the same time, all 16-bits data are written into the device.
UCAS
and
LCAS
cannot be staggered within the same write/read cycles.
18.All the V
CC
and V
SS
pins shall be supplied with the same voltages.
19.t
ASC
, t
CAH
, t
RCS
, t
WCS
, t
WCH
, t
CSR
and t
RPC
are determined by the earlier falling edge of
UCAS
or
LCAS
.
20.t
CRP
, t
CHR
, t
ACP
, t
RCH
and t
CPW
are determined by the later rising edge of
UCAS
or
LCAS
.
21.t
CWL,
t
DH,
t
DS
and t
CHS
should be satisfied by both
UCAS
and
LCAS
.
t
RPS
t
CHS
110
—
130
—
150
—
ns
–
50
—
–
50
—
–
50
—
ns
21
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM514260CLTT-8 | 262,144-word x 16-bit Dynamic Random Access Memory |
| HM514260CTT-6 | 262,144-word x 16-bit Dynamic Random Access Memory |
| HM514260CTT-6R | 262,144-word x 16-bit Dynamic Random Access Memory |
| HM514260CTT-7 | 262,144-word x 16-bit Dynamic Random Access Memory |
| HM514260CTT-8 | 262,144-word x 16-bit Dynamic Random Access Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM514260CLTT-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Fast Page Mode DRAM |
| HM514260CLZ-6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Fast Page Mode DRAM |
| HM514260CLZ-7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Fast Page Mode DRAM |
| HM514260CLZ-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Fast Page Mode DRAM |
| HM514260CTT-6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Fast Page Mode DRAM |
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