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參數(shù)資料
| 型號(hào)： | HM62G36128 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4M Synchronous Fast Static RAM (128k-words ×36-bits)(4M同步快速靜態(tài)RAM(128k字 ×36位)) |
| 中文描述： | 4分同步快速靜態(tài)存儲(chǔ)器（128K的，字× 36位）（4分同步快速靜態(tài)隨機(jī)存儲(chǔ)器（128K的字× 36位）） |
| 文件頁數(shù)： | 5/23頁 |
| 文件大?。?/td> | 206K |
| 代理商： | HM62G36128 |
HM62G36128 Series
5
Truth Table
ZZ
SS
G
SWE
SWEa
SWEb
SWEc
SWEd
K
K
Operation
DQ(n)
DQ(n+1)
H
X
X
X
X
X
X
X
X
X
sleep mode
High-Z
High-Z
L
H
X
X
X
X
X
X
L-H
H-L
Dead (not
selected)
X
High-Z
L
X
H
X
X
X
X
X
X
X
Dead (Dummy
read)
High-Z
High-Z
L
L
L
H
X
X
X
X
L-H
H-L
Read
X
Dout(a,b,c,d
)0-8
L
L
X
L
L
L
L
L
L-H
H-L
Write a, b, c,
d byte
High-Z
Din(a,b,c,d)0
-8
L
L
X
L
H
L
L
L
L-H
H-L
Write b, c, d
byte
High-Z
Din(b,c,d)0-8
L
L
X
L
L
H
L
L
L-H
H-L
Write a, c, d
byte
High-Z
Din(a,c,d)0-8
L
L
X
L
L
L
H
L
L-H
H-L
Write a, b, d
byte
High-Z
Din(a,b,d)0-
8
L
L
X
L
L
L
L
H
L-H
H-L
Write a, b, c
byte
High-Z
Din(a,b,c)0-8
L
L
X
L
H
H
L
L
L-H
H-L
Write c, d byte
High-Z
Din(c,d)0-8
L
L
X
L
L
H
H
L
L-H
H-L
Write a, d
byte
High-Z
Din(a,d)0-8
L
L
X
L
L
L
H
H
L-H
H-L
Write a, b
byte
High-Z
Din(a,b)0-8
L
L
X
L
H
L
L
H
L-H
H-L
Write b,c byte
High-Z
Din(b,c)0-8
L
L
X
L
H
H
H
L
L-H
H-L
Write d byte
High-Z
Din(d)0-8
L
L
X
L
H
H
L
H
L-H
H-L
Write c byte
High-Z
Din(c)0-8
L
L
X
L
H
L
H
H
L-H
H-L
Write b byte
High-Z
Din(b)0-8
L
L
X
L
L
H
H
H
L-H
H-L
Write a byte
High-Z
Din(a)0-8
Notes: 1. X means don’t care for synchronous inputs, and H or L for asynchronous inputs.
2.
SWE
,
SS
,
SWEa
to
SWEd
, SA are sampled at the rising edge of K clock.
3. Although differential clock operation is implied, this SRAM will operate properly with one clock
phase (either K or
K
)tied to Vref. Under such single-ended clock operation, all parameters
specification within this document will be met.
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