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參數(shù)資料
| 型號： | HM62W8128LFP-10 |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 100 ns, PDSO32 |
| 封裝： | 0.525 INCH, PLASTIC, SOP-32 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 84K |
| 代理商： | HM62W8128LFP-10 |
HM62W8128 Series
12
Write Timing Waveform (2) (
OE Low Fixed)
Address
CS1
WE
Dout
Din
t WC
t CW
t WR
t AW
t WP
tAS
t WHZ
t OW
t OH
t DW
t DH
*4
*2
*3
*1
Valid address
Valid data
CS2
High Impedance
Notes: 1. If
CS1 goes low simultaneously with WE going low or after WE going low, the outputs
remain in a high impedance state.
2.Dout is the same phase of the latest written data in this write cycle.
3.Dout is the read data of next address.
4.If
CS1 is low and CS2 high during this period, I/O pins are in the output state. Therefore, the
input signals of the opposite phase to the outputs must not be applied to them.
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