參數(shù)資料
型號(hào): HPC-DEV-SYS2-E
廠商: National Semiconductor Corporation
英文描述: CABLE, COAX, RG179, BROWN, 3MM, 25M; Length, Reel (Imperial):82ft; Attenuation, 400MHz:68.90dB; Capacitance:75pF/m; Conductor make-up:7/0.102 mm; Diameter, External:3.00mm; Impedance:75R; Length, Reel (Metric):25m; Resistance, per RoHS Compliant: Yes
中文描述: 高性能通信微控制器
文件頁數(shù): 2/30頁
文件大?。?/td> 362K
代理商: HPC-DEV-SYS2-E
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Total Allowable Source or Sink Current
100 mA
Storage Temperature Range
b
65
§
C to
a
150
§
C
Lead Temperature (Soldering, 10 sec.)
300
§
C
V
CC
with Respect to GND
All Other Pins
b
0.5V to 7.0V
(V
CC
a
0.5)V to (GND
b
0.5)V
Note: Absolute maximum ratings indicate limits beyond
which damage to the device may occur. DC and AC electri-
cal specifications are not ensured when operating the de-
vice at absolute maximum ratings.
DC Electrical Characteristics
V
CC
e
5.0V
g
10% unless otherwise specified, T
A
e
0
§
C to
a
70
§
C for
HPC46400E,
b
40
§
C to
a
85
§
C for HPC36400E
Symbol
Parameter
Test Conditions
Min
Max
Units
I
CC1
Supply Current
V
CC
e
5.5V, f
in
e
20.0 MHz (Note 1)
70
mA
V
CC
e
5.5V, f
in
e
2.0 MHz (Note 1)
10
mA
I
CC2
IDLE Mode Current
V
CC
e
5.5V, f
in
e
20.0 MHz (Note 1)
10
mA
V
CC
e
5.5V, f
in
e
2.0 MHz (Note 1)
2
mA
I
CC3
HALT Mode Current
V
CC
e
5.5V, f
in
e
0 kHz (Note 1)
500
m
A
V
CC
e
2.5V, f
in
e
0 kHz (Note 1)
150
m
A
INPUT VOLTAGE LEVELSDSCHMITT TRIGGERED: RESET, WO, D0, NMI, I2, I3; AND ALSO CKI
V
IH1
V
IL1
Logic High
0.9 V
CC
V
Logic Low
0.1 V
CC
V
INPUT VOLTAGE LEVELSDPORT A
V
IH2
V
IL2
Logic High
2.0
V
Logic Low
0.8
V
INPUT VOLTAGE LEVELSDALL OTHERS
V
IH3
V
IL3
Logic High
0.7 V
CC
V
Logic Low
0.2 V
CC
V
I
LI
Input Leakage Current
(Note 2)
g
1
m
A
C
I
Input Capacitance
(Note 3)
10
pF
C
IO
I/O Capacitance
(Note 3)
20
pF
OUTPUT VOLTAGE LEVELS
V
OH1
V
OL1
V
OH2
V
OL2
V
OH3
V
OL3
V
OH4
V
OL4
Logic High (CMOS)
I
OH
e b
10
m
A (Note 3)
V
CC
b
0.1
V
Logic Low (CMOS)
I
OL
e
10
m
A (Note 3)
0.1
V
Port A/B Drive, CK2
(A
0
–A
15
, B
10
, B
11
, B
12
, B
15
)
I
OH
e b
1 mA
2.4
V
I
OL
e
3 mA
0.4
V
Other Port Pin Drive, WO (open drain)
(B
0
–B
9
, B
13
, B
14
, R
0
–R
7
, D
5
, D
7
)
I
OH
e b
1.6 mA (except WO)
2.4
V
I
OL
e
0.5 mA
0.4
V
ST1 and ST2 Drive
I
OH
e b
6 mA
2.4
V
I
OL
e
1.6 mA (Note 4)
0.4
V
V
RAM
RAM Keep-Alive Voltage
(Note 5)
2.5
V
I
OZ
TRI-STATE Leakage Current
V
IN
e
0 and V
IN
e
V
CC
g
5
m
A
Note 1:
I
, I
, I
CC3
measured with no external drive (I
OH
and I
OL
e
0, I
IH
and I
IL
e
0). I
CC1
is measured with RESET
e
V
SS
. I
CC3
is measured with NMI
e
V
CC
. CKI driven to V
IH1
and V
IL1
with rise and fall times less than 10 ns.
Note 2:
RDY/HLD and RDY/I4 pins have internal pullups and meet this spec only at V
IN
e
V
CC
.
Note 3:
These parameters are guaranteed by design and are not tested.
Note 4:
ST2 drive will not meet this spec under condition of RESET pin
e
low.
Note 5:
Test duration is 100 ms.
2
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