參數(shù)資料
型號(hào): HS4339ESS01H
廠商: Hitachi,Ltd.
英文描述: 4-bit HMCS400-Series microcomputer with large-capacity memory
中文描述: 4位HMCS400系列的大容量存儲(chǔ)器微機(jī)
文件頁數(shù): 11/78頁
文件大?。?/td> 337K
代理商: HS4339ESS01H
HD404339 Series
11
Table 1
Initial Values of Flags after MCU Reset
Item
Initial Value
Interrupt flags/mask
Interrupt enable flag (IE)
0
Interrupt request flag (IF)
0
Interrupt mask (IM)
1
Bit registers
Watchdog timer on flag (WDON)
0
A/D start flag (ADSF)
0
Input capture status flag (ICSF)
0
Input capture error flag (ICEF)
0
I
AD
off flag (IAOF)
RAM enable flag (RAME)
0
0
Low speed on flag (LSON)
0
Direct transfer on flag (DTON)
0
Bit 3
Bit 2
Bit 1
Bit 0
IMTA
(IM of timer A)
IFTA
(IF of timer A)
IM1
(IM of
INT
1
)
IF1
(IF of
INT
1
)
IMTC
(IM of timer C)
IFTC
(IF of timer C)
IMTB
(IM of timer B)
IFTB
(IF of timer B)
IMS
(IM of serial)
IFS
(IF of serial)
IMAD
(IM of A/D)
IFAD
(IF of A/D)
$0000
$0001
$0002
$0003
IM0
(IM of
INT
0
)
IF0
(IF of
INT
0
)
RSP
(Reset SP bit)
IE
(Interrupt
enable flag)
ICSF
(Input capture
status flag)
$020
$021
$022
$023
DTON
(Direct transfer
on flag)
RAME
(RAM enable
flag)
ADSF
(A/D start flag)
WDON
(Watchdog
on flag)
ICEF
(Input capture
error flag)
LSON
(Low speed
on flag)
IF: Interrupt
request flag
IM: Interrupt
mask
IE: Interrupt
enable flag
SP:
Stack pointer
Bit 3
Bit 2
Bit 1
Bit 0
RAM Address
IAOF
(I
AD
off flag)
Not used
Interrupt control bits area
Register flag area
Figure 3 Interrupt Control Bits and Register Flag Areas Configuration
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