參數(shù)資料
型號(hào): HS9-82C37ARH-Q
廠商: INTERSIL CORP
元件分類: 數(shù)學(xué)處理器
英文描述: Radiation Hardened CMOS High Performance Programmable DMA Controller
中文描述: 4 CHANNEL(S), 5 MHz, DMA CONTROLLER, CDFP42
封裝: METAL SEALED, CERAMIC, DFP-42
文件頁(yè)數(shù): 16/28頁(yè)
文件大?。?/td> 253K
代理商: HS9-82C37ARH-Q
16
HS-82C37ARH
Burn-In Circuits
HS-82C37ARH 40 LEAD SBDIP
HS-82C37ARH 40 LEAD SBDIP
STATIC CONFIGURATION
NOTES:
1. VDD = +6.0V
±
5%
2. T
A
= +125
o
C Minimum
3. Resistors:
R1 = 10k
±
10% (Pins 6, 7, 11-13, 17 - 20)
R2 = 2.7k
±
5% (Pins 1, 2, 21-23, 24, 28-32, 34-39)
Part is Static Sensitive
Voltage Must be Ramped
START-UP TIMING
NOTES:
1. F0 is 50% duty cycle square wave pulse burst.
2. 1.0kHz
F0
100kHz
3. 10 cycles
F0 Pulse Burst
1.0s
4. F1 = Single pulse with width equal to 2 cycles of F0
5. F1 is left Low after pulse burst
6. F1 pulse occurs after start of F0 and ends before F0.
Input levels: 0.9VDD
VIH
VDD, -0.3V
VIL
0.7V
F0 is left High after pulse burst
DYNAMIC CONFIGURATION
NOTES:
1. VDD = 6.5V
±
5% (Burn-In)
2. VDD = 6.0V
±
5% (Life Test)
3. T
A
= +125
o
C Minimum
4. Part is Static Sensitive, Voltage Must be Ramped
5. Resistors:
R1 = 10k
±
10% (Pins 6, 7, 11-13, 17 - 20)
R2 = 2.7k
±
10% (Pins 1, 2, 22-24, 28-32, 34-37, and LOADS)
33
34
35
36
37
38
39
40
32
31
30
29
24
25
26
27
28
21
22
23
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
F1
F0
VDD
LOAD
2.7K
2.7K
VDD
33
34
35
36
37
38
39
40
32
31
30
29
24
25
26
27
28
21
22
23
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
VDD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
NC
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
F0
F0
F5
F2
F1
F0
F5
F4
F3
F1
F2
F3
F4
F0
F1
Spec Number
518058
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