參數(shù)資料
型號(hào): HSMP-389V
英文描述: Surface Mount RF PIN Switch Diode(表貼型射頻 PIN 開(kāi)關(guān)二極管)
中文描述: 表面貼裝射頻PIN開(kāi)關(guān)二極管(表貼型射頻的PIN開(kāi)關(guān)二極管)
文件頁(yè)數(shù): 7/12頁(yè)
文件大小: 148K
代理商: HSMP-389V
7
Equivalent Circuit Model
HSMP-389x Chip*
0.12 pF*
* Measured at -20 V
0.5
R
j
R
s
C
j
R
= 20
I
0.9
I = Forward Bias Current in mA
* See AN1124 for package models
R
T
= 0.5 + R
j
C
T
= C
P
+ C
j
Typical Applications for
HSMP-489x Low
Inductance Series
Microstrip Series Connection
for HSMP-489x Series
In order to take full advantage of
the low inductance of the
HSMP-489x series when using
them in series applications, both
lead 1 and lead 2 should be
connected together, as shown in
Figure 17.
1
2
3
HSMP-489x
Figure 16. Internal Connections.
Figure 17. Circuit Layout.
Microstrip Shunt Connections
for HSMP-489x Series
In Figure 18, the center conductor
of the microstrip line is inter-
rupted and leads 1 and 2 of the
HSMP-489x diode are placed
across the resulting gap. This
forces the 1.5 nH lead inductance
of leads 1 and 2 to appear as part
of a low pass filter, reducing the
shunt parasitic inductance and
increasing the maximum available
attenuation. The 0.3 nH of shunt
inductance external to the diode
is created by the via holes, and is
a good estimate for 0.032" thick
material.
50 OHM MICROSTRIP LINES
PAD CONNECTED TO
GROUND BY TWO
VIA HOLES
Figure 18. Circuit Layout.
0.3 nH
0.3 nH
0.3 pF
1.5 nH
1.5 nH
Figure 19. E quivalent Circuit.
Co-Planar Waveguide Shunt
Connection for HSMP-489x
Series
Co-Planar waveguide, with
ground on the top side of the
printed circuit board, is shown in
Figure 20. Since it eliminates the
need for via holes to ground, it
offers lower shunt parasitic
inductance and higher maximum
attenuation when compared to a
microstrip circuit.
Co-Planar Waveguide
Groundplane
Center Conductor
Groundplane
Figure 20. Circuit Layout.
0.3 pF
0.75 nH
Figure 21. E quivalent Circuit.
A SPICE model is not available
for PIN diodes as SPICE does not
provide for a key PIN diode
characteristic, carrier lifetime.
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