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參數(shù)資料
| 型號： | HY29LV160TT-70I |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory |
| 中文描述： | 1M X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| 封裝： | TSOP-48 |
| 文件頁數(shù)： | 22/48頁 |
| 文件大?。?/td> | 517K |
| 代理商： | HY29LV160TT-70I |
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22
Rev. 1.2/May 01
HY29LV160
While the Automatic Erase algorithm is operating,
successive read cycles at any address cause
DQ[6] to toggle. DQ[6] stops toggling when the
erase operation is complete or when the device is
placed in the Erase Suspend mode. The host may
use DQ[2] to determine which sectors are erasing
or erase-suspended (see below). After an Erase
command sequence is written, if all sectors se-
lected for erasing are protected, DQ[6] toggles for
approximately 100 μs, then returns to reading ar-
ray data. If at least one selected sector is not
protected, the Automatic Erase algorithm erases
the unprotected sectors, and ignores the selected
sectors that are protected.
DQ[2] - Toggle Bit II
Toggle Bit II, DQ[2], when used with DQ[6], indi-
cates whether a particular sector is actively eras-
ing or whether that sector is erase-suspended.
Toggle Bit II is valid after the rising edge of the
final WE# pulse in the command sequence. The
device toggles DQ[2] with each OE# or CE# read
cycle.
Read DQ[7:0]
at Valid Address (Note 1)
DQ[6] Toggled
NO
(Note 3)
YES
PROGRAM/ERASE
COMPLETE
DQ[5] = 1
NO
YES
Read DQ[7:0]
at Valid Address (Note 1)
DQ[6] Toggled
(Note 2)
NO
YES
PROGRAM/ERASE
EXCEEDED TIME ERROR
Notes
:
1. During programming, the program address.
During sector erase, an address within any sector scheduled for erasure.
2. Recheck DQ[6] since toggling may stop at the same time as DQ[5] changes from 0 to 1.
3. Use this path if testing for Program/Erase status.
4. Use this path to test whether sector is in Erase Suspend mode.
Read DQ[7:0]
at Valid Address (Note 1)
START
Read DQ[7:0]
DQ[2] Toggled
NO
SECTOR BEING READ
IS IN ERASE SUSPEND
Read DQ[7:0]
YES
NO
(Note 4)
SECTOR BEING READ
IS NOT IN ERASE SUSPEND
Figure 8. Toggle Bit I and II Test Algorithm
DQ[2] toggles when the host reads at addresses
within sectors that have been specified for era-
sure, but cannot distinguish whether the sector is
actively erasing or is erase-suspended. DQ[6],
by comparison, indicates whether the device is ac-
tively erasing or is in Erase Suspend, but cannot
distinguish which sectors are specified for erasure.
Thus, both status bits are required for sector and
mode information.
Figure 8 illustrates the operation of Toggle Bits I
and II.
DQ[5] - Exceeded Timing Limits
DQ[5] is set to a
‘
1
’
when the program or erase
time has exceeded a specified internal pulse count
limit. This is a failure condition that indicates that
the program or erase cycle was not successfully
completed. DQ[5] status is valid only while DQ[7]
or DQ[6] indicate that the Automatic Algorithm is
in progress.
The DQ[5] failure condition will also be signaled if
the host tries to program a
‘
1
’
to a location that is
previously programmed to
‘
0
’
, since only an erase
operation can change a
‘
0
’
to a
‘
1
’
.
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| HY29LV160TT-90I | 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY29LV160TT-80 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory |
| HY29LV160TT-80I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory |
| HY29LV160TT-90 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory |
| HY29LV160TT-90I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory |
| HY29LV320 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:32 Mbit (2M x 16) Low Voltage Flash Memory |
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