參數(shù)資料
型號(hào): HYB25D128800ATL-7
廠商: INFINEON TECHNOLOGIES AG
英文描述: 128 Mbit Double Data Rate SDRAM
中文描述: 128兆雙倍數(shù)據(jù)速率SDRAM
文件頁數(shù): 56/85頁
文件大小: 3085K
代理商: HYB25D128800ATL-7
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HYB25D128[400/800/160]C[C/E/T](L)
128 Mbit Double Data Rate SDRAM
Functional Description
Data Sheet
56
Rev. 1.0, 2004-04
Table 10
Current State
Any
Truth Table 4: Current State Bank n - Command to Bank m (different bank)
CS
RAS CAS WE
Command
H
X
X
X
Deselect
L
H
H
H
No Operation
X
X
X
X
Any Command
Otherwise Allowed
to Bank m
Row Activating,
Active, or
Precharging
L
H
L
L
Write
L
L
H
L
Precharge
Read (Auto
Precharge
Disabled)
Action
NOP. Continue previous operation.
NOP. Continue previous operation.
Notes
1)2)3)4)5)6)
1) to 6)
Idle
1) to 6)
L
L
L
H
H
L
H
H
Active
Read
Select and activate row
Select column and start Read burst
Select column and start Write burst
Select and activate row
Select column and start new Read
burst
Select and activate row
Select column and start Read burst
Select column and start new Write
burst
Select and activate row
Select column and start new Read
burst
Select column and start Write burst
Select and activate row
Select column and start Read burst
Select column and start new Write
burst
1) to 6)
1) to 7)
1) to 7)
1) to 6)
L
L
L
H
H
L
H
H
Active
Read
1) to 6)
1) to 7)
L
L
L
L
L
L
H
H
H
H
L
L
L
H
H
L
Precharge
Active
Read
Write
1) to 6)
Write (Auto
Precharge
Disabled)
1) to 6)
1) to 8)
1) to 7)
L
L
L
L
L
H
H
H
L
L
H
H
Precharge
Active
1) to 6)
Read (With Auto
Precharge)
1) to 6)
1) to 7), 9)
L
L
L
L
L
H
L
L
H
H
L
H
H
L
L
L
L
H
H
L
Write
Precharge
Active
Read
Write
1) to 7), 9), 10)
1) to 6)
Write (With Auto
Precharge)
1) to 6)
1) to 7), 9)
1) to 7), 9)
L
L
H
L
Precharge
1) to 6)
1) This table applies when CKE n-1 was HIGH and CKE n is HIGH (see
Table 8
: Clock Enable (CKE) and after
t
XSNR
/
t
XSRD
has been met (if the previous state was self refresh).
2) This table describes alternate bank operation, except where noted, i.e., the current state is for bank n and the commands
shown are those allowed to be issued to bank m (assuming that bank m is in such a state that the given command is
allowable). Exceptions are covered in the notes below.
3) Current state definitions:
Idle: The bank has been precharged, and
t
RP
has been met.
Row Active: A row in the bank has been activated, and
t
RCD
has been met. No data bursts/accesses and no register
accesses are in progress.
Read: A Read burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Write: A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Read with Auto Precharge Enabled: See
10)
.
Write with Auto Precharge Enabled: See
10)
.
4) AUTO REFRESH and Mode Register Set commands may only be issued when all banks are idle.
5) A BURST TERMINATE command cannot be issued to another bank; it applies to the bank represented by the current state
only.
6) All states and sequences not shown are illegal or reserved.
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