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參數(shù)資料
| 型號(hào)： | HYB314175BJ-50- |
| 廠商： | SIEMENS AG |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | High-Speed Fully-Differential Amplifiers 8-MSOP-PowerPAD -40 to 85 |
| 中文描述： | 3.3V的256畝× 16位江戶的DRAM 3.3V的256畝× 16位江戶與DRAM的低功率版本自刷新 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 1307K |
| 代理商： | HYB314175BJ-50- |
HYB 314175BJ/BJL-50/-55/-60
3.3V 256K x 16 EDO-DRAM
Semiconductor Group
7
AC Characteristics
5) 6)
T
A
= 0 to 70
°
C;
V
SS
= 0 V;
V
CC
= 3.3 V
±
0.3 V,
t
T
= 2 ns
Parameter
Symbol
Limit Values
Unit
Note
-50
-55
-60
min
max min
max min
max
Common Parameters
Random read or write cycle time
t
RC
t
RP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
t
T
t
REF
t
REF
89
–
94
–
104
–
ns
RAS precharge time
35
–
35
–
40
–
ns
RAS pulse width
50
10k
55
10k
60
10k
ns
CAS pulse width
8
10k
8
10k
10
10k
ns
Row address setup time
0
–
0
–
0
–
ns
Row address hold time
8
–
8
–
10
–
ns
Column address setup time
0
–
0
–
0
–
ns
Column address hold time
8
–
8
–
10
–
ns
RAS to CAS delaytime
12
37
12
43
14
45
ns
RAS to column address delay time
10
25
10
30
12
30
ns
RAS hold time
13
–
13
–
15
–
ns
CAS hold time
40
–
45
–
50
–
ns
CAS to RAS precharge time
5
–
5
–
5
–
ns
Transition time(rise and fall)
1
50
1
50
1
50
ns
7
Refresh period
–
16
–
16
–
16
ms
Refresh period (L-version)
–
128
–
128
–
128
ms
Read Cycle
Access time from RAS
t
RAC
t
CAC
t
AA
t
OEA
t
RAL
t
RCS
t
RCH
t
RRH
–
50
–
55
–
60
ns
8, 9
Access time from CAS
–
13
–
13
–
15
ns
8, 9
Access time from column address
–
25
–
25
–
30
ns
8,10
OE access time
–
13
–
13
–
15
ns
Column address to RAS lead time
25
–
25
–
30
–
ns
Read command setup time
0
–
0
–
0
–
ns
Read command hold time
0
–
0
–
0
–
ns
11
Read command hold time ref. to
RAS
0
–
0
–
0
–
ns
11
CAS to output inlow-Z
t
CLZ
0
–
0
–
0
–
ns
8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB314175BJ-55 | High-Speed Fully-Differential Amplifiers 8-MSOP-PowerPAD -40 to 85 |
| HYB314175BJ-60 | Transistor Array IC; Package/Case:16-DIP; Mounting Type:Through Hole |
| HYB 314175BJ-55 | 3.3V 256 K x 16-Bit EDO-DRAM(3.3V 256K×16位 外延式數(shù)據(jù)輸出（EDO)動(dòng)態(tài)RAM) |
| HYB 314175BJ-60 | 3.3V 256 K x 16-Bit EDO-DRAM(3.3V 256K×16位 外延式數(shù)據(jù)輸出（EDO)動(dòng)態(tài)RAM) |
| HYB 314175BJL-50 | 3.3V 256 K x 16-Bit EDO-DRAM(3.3V 256K×16位 外延式數(shù)據(jù)輸出（EDO)動(dòng)態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB314175BJ-55 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 256 K x 16-Bit EDO-DRAM 3.3V 256 K x 16-Bit EDO-DRAM Low power version with Self Refresh |
| HYB314175BJ-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 256 K x 16-Bit EDO-DRAM 3.3V 256 K x 16-Bit EDO-DRAM Low power version with Self Refresh |
| HYB314175BJL-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 256 K x 16-Bit EDO-DRAM 3.3V 256 K x 16-Bit EDO-DRAM Low power version with Self Refresh |
| HYB314175BJL-55 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 256 K x 16-Bit EDO-DRAM 3.3V 256 K x 16-Bit EDO-DRAM Low power version with Self Refresh |
| HYB314175BJL-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 256 K x 16-Bit EDO-DRAM 3.3V 256 K x 16-Bit EDO-DRAM Low power version with Self Refresh |
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