參數(shù)資料
型號: HYB39S16160CT-7
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 1M x 16 MBit Synchronous DRAM for High Speed Graphics Applications
中文描述: 1M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO50
封裝: 0.400 INCH, PLASTIC, TSOP2-50
文件頁數(shù): 5/22頁
文件大小: 147K
代理商: HYB39S16160CT-7
HYB 39S16400/800/160AT-8/-10
16 MBit Synchronous DRAM
Semiconductor Group
5
1998-10-01
DQM
LDQM
UDQM
Input
Pulse
Active
High
The Data Input/Output mask places the DQ buffers in a
high impedance state when sampled high. In Read mode,
DQM has a latency of two clock cycles and controls the
output buffers like an output enable. In Write mode, DQM
has a latency of zero and operates as a word mask by
allowing input data to be written if it is low but blocks the
write operation if DQM is high.
V
DD
V
SS
V
DDQ
V
SSQ
Supply
Power and ground for the input buffers and the core logic.
Supply –
Isolated power supply and ground for the output buffers to
provide improved noise immunity.
Signal Pin Description
(cont’d)
Pin
Type
Signal Polarity Function
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