參數(shù)資料
型號: HYB39S16320TQ-6
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 128 x 64 pixel format, LED Backlight available
中文描述: 512K X 32 SYNCHRONOUS GRAPHICS RAM, 5.5 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 31/70頁
文件大小: 563K
代理商: HYB39S16320TQ-6
HYB 39S16320TQ-6/-7/-8
Semiconductor Group
31
1998-10-01
Timing Diagrams
1
Bank Activate Command Cycle
2
Burst Read Operation
3
Read Interrupted by a Read
4
4.1
4.2
4.3
4.4
Read to Write Interval
Read to Write Interval
Minimum Read to Write Interval
Non-Minimum Read to Write Interval
Single Bit Write Cycle
5
5.1
5.2
5.3
5.4
Burst Write Operation
Burst Write
Load Mode Register and Block Write Cycle
Read and DQM Function
Write and DQM Function
6
6.1
6.2
Write and Read Interrupt
Write Interrupted by a Write
Write Interrupted by a Read
7
7.1
7.2
Burst Write and Read with Auto Precharge
Burst Write with Auto Precharge
Burst Read with Auto Precharge
8
8.1
8.2
Burst Termination
Termination of a Full Page Burst Read Operation
Termination of a Full Page Burst Write Operation
9
9.1
9.2
AC Parameters
AC Parameters for Write Timing
AC Parameters for Read Timing
10
Mode Register Set
11
Power on Sequence and Auto Refresh (CBR)
12
12.1
12.2
12.3
12.4
Clock Suspension (Using CKE)
Clock Suspension During Burst Read CAS Latency = 2
Clock Suspension During Burst Read CAS Latency = 3
Clock Suspension During Burst Write CAS Latency = 2
Clock Suspension During Burst Write CAS Latency = 3
13
Power Down Mode and Clock Suspend
14
Self Refresh (Entry and Exit)
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