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參數(shù)資料
| 型號： | HYS 72D32000GR |
| 廠商： | SIEMENS AG |
| 英文描述： | 2.5 V 184-pin Registered DDR-I SDRAM Modules(2.5 V 184腳、256M位寄存型 DDR-I SDRAM 模塊) |
| 中文描述： | 2.5伏184針注冊的DDR - 1 SDRAM的模塊（2.5伏184腳，有256M位寄存型的DDR - SDRAM內(nèi)存模塊余） |
| 文件頁數(shù)： | 10/18頁 |
| 文件大?。?/td> | 1072K |
| 代理商： | HYS 72D32000GR |
HYS 72Dxx0x0GR
Registered DDR-I SDRAM-Modules
Target Datasheet
10
4.00
Supply Voltage Levels
Parameter
Symbol
Limit Values
Unit
Notes
min.
2.3
nom.
2.5
max.
2.7
Device Supply Voltage
V
DD
V
DDQ
V
REF
V
TT
V
–
Output Supply Voltage
2.3
2.5
2.7
V
1)
1)
Under all conditions,
V
DDQ
must be less than or equal to
V
DD
.
Peak to peak AC noise on
V
REF
may not exceed ± 2%
V
REF (DC)
.
V
REF
is also expected to track noise variations
in
V
DDQ
.
3)
V
TT
of the transmitting device must track
V
REF
of the receiving device.
Input Reference Voltage
1.15
V
REF
– 0.04
V
REF
1.25
1.35
V
REF
+ 0.04
V
2)
2)
Termination Voltage
V
3)
DC Operating Conditions (SSTL_2 Inputs)
(
V
DDQ
= 2.5 V,
T
A
= 70
°
C, Voltage Referenced to
V
SS
)
Parameter
Symbol
Limit Values
Unit
Notes
min.
V
REF
+ 0.18
– 0.30
max.
V
DDQ
+ 0.3
V
REF
– 0.18
5
DC Input Logic High
V
IH (DC)
V
IL (DC)
I
IL
I
OL
V
1)
1)
The relationship between the
V
DDQ
of the driving device and the
V
REF
of the receiving device is what determines
noise margins. However, in the case of
V
IH (max)
(input overdrive), it is the
V
of the receiving device that is
referenced. In the case where a device is implemented such that it supports SSTL_2 inputs but has no SSTL_2
outputs (such as a translator), and therefore no
V
DDQ
supply voltage connection, inputs must tolerate input
overdrive to 3.0 V (High corner
V
DDQ
+ 300 mV).
For any pin under test input of 0 V
≤
V
IN
≤
V
DDQ
+ 0.3 V.
DC Input Logic Low
V
μ
A
μ
A
–
Input Leakage Current
– 5
2)
2)
Output Leakage Current
– 5
5
2)
Capacitance (target, not verified)
T
A
= 0 to 70
°
C;
V
DD
= 2.5 V
±
0.2 V,
f
= 1 MHz
Parameter
Symbol
Limit Values (max.)
Unit
One Bank
modules
10
Two Bank
Modules
20
Input Capacitance
(all inputs except CLK,CLK & CKE)
C
IN
pF
Input Capacitance
(CLK, CLK )
C
CLK
C
CKE
C
IO
30
30
pF
Input Capacitance (CKE)
17
30
pF
Input/Output Capacitance
(DQ0 - DQ63, CB0 - CB7)
10
17
pF
Input Capacitance (SCL, SA0 - 2)
C
SC
C
SD
8
8
pF
Input/Output Capacitance (SDA)
8
8
pF
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72D32000GR-7-A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D32000GR-7-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D32000GR-8-A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D32000GR-8-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D32000GU-7-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?256MB (32Mx72) PC2100 1-bank? |
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