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參數(shù)資料
| 型號： | HYS64T128020GU-5-A |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | CAPACITOR-CERAMIC |
| 中文描述： | 240針無緩沖DDR2 SDRAM內(nèi)存模塊 |
| 文件頁數(shù)： | 6/67頁 |
| 文件大?。?/td> | 1527K |
| 代理商： | HYS64T128020GU-5-A |
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HYS[64T[3200/6400/12802]0/72T[6400/12802]0][G/H]U–[3.7/5]–A
512 Mbit DDR2 SDRAM
Overview
Data Sheet
6
Rev. 0.87, 2004-06
09122003-GZEK-H4J6
1
Overview
This chapter gives an overview of the 1.8 V 240-pin Unbuffered DDR2 SDRAM Modules, 256 MByte, 512 MByte
& 1 GByte ECC and non-ECC Modules and describes its main characteristics.
1.1
Features
240-pin ECC and Non-ECC Unbuffered 8-Byte
Dual-In-Line DDR2 SDRAM Module for PC,
Workstation and Server main memory applications
One rank 32M x 64, 64M x 64, 64M x 72 and two
ranks 128M
×
64 and 128M x 72 organization
JEDEC standard Double Data Rate 2 Synchronous
DRAMs (DDR2 SDRAM) with a single + 1.8 V
(
±
0.1 V) power supply
256 ,512 MByte and 1GByte modules built with
512Mb DDR2 SDRAMs in 60-ball
(P–TFBGA–60)
and
84-ball FBGA
(P–TFBGA–84)
chipsize
packages
Programmable CAS Latencies (3, 4 & 5), Burst
Length (8 & 4) and Burst Type
Auto Refresh (CBR) and Self Refresh
All inputs and outputs SSTL_1.8 compatible
OCD (Off-Chip Driver Impedance Adjustment) and
ODT (On-Die Termination)
Serial Presence Detect with E
2
PROM
Low Profile Modules form factor:
133.35 mm x 30,00 mm (MO-237)
Based on JEDEC standard reference card layouts
Raw Card “A”, “B” & “C”
1.2
Description
The INFINEON HYS[64/72]Txxxx0[G/H]U module
family are low profile Unbuffered DIMM modules with
30,0 mm height based on DDR2 technology. DIMMs
are available as non-ECC modules in 32M x 64
(256MB), 64M x 64 (512MB) and 128M x 64 (1024MB)
and as ECC-modules in 64M x 72 (512MB) and 128M
x 72 (1024MB) organisation and density, intended for
mounting into 240 pin connector sockets.
The memory array is designed with 512Mb Double
Data Rate (DDR2) Synchronous DRAMs for ECC and
Non-ECC applications. Decoupling capacitors are
mounted on the PCB board. The DIMMs feature serial
presence detect based on a serial E
2
PROM device
using the 2-pin I
2
C protocol. The first 128 bytes are
programmed with configuration data and the second
128 bytes are available to the customer.
Table 1
Speed Grade Indicator
Component Speed Grade
Module Speed Grade
Max. Clock Frequency @ CL = 3
Max. Clock Frequency @ CL = 4 & 5
Performance
–5
DDR2–400
PC2–3200
200
200
–-3.7
DDR2–533
PC2–4200
200
266
Unit
—
—
MHz
MHz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72T64000GU-5-A | 240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS64T64000GU-5-A | 240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS72T128020HR-37-A | DDR2 Registered Memory Modules |
| HYS72T64000HR-37-A | DDR2 Registered Memory Modules |
| HYS72T128020HR-5-A | DDR2 Registered Memory Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS64T128020HU | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
| HYS64T128020HU-2.5-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
| HYS64T128020HU-25F-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
| HYS64T128020HU-3.7-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS64T128020HU-3.7-B | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
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