- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370806 > HYS72D64020GU-7F-B (INFINEON TECHNOLOGIES AG) RES 1.8K OHM 1/16W 5% 0402 SMD PDF資料下載
參數(shù)資料
| 型號： | HYS72D64020GU-7F-B |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | RES 1.8K OHM 1/16W 5% 0402 SMD |
| 中文描述： | 184引腳緩沖雙列內(nèi)存模組 |
| 文件頁數(shù)： | 28/51頁 |
| 文件大?。?/td> | 1356K |
| 代理商： | HYS72D64020GU-7F-B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
HYS[64/72]D[16x01/32x00/64x20][G/E]U-[5/6/7/8]-B
Unbuffered DDR SDRAM Modules
Electrical Characteristics
Data Sheet
28
V1.1, 2003-07
7)
t
HZ
and
t
LZ
transitions occur in the same access time windows as valid data transitions. These parameters are not referred
to a specific voltage level, but specify when the device is no longer driving (HZ), or begins driving (LZ).
8) The specific requirement is that DQS be valid (HIGH, LOW, or some point on a valid transition) on or before this CK edge.
A valid transition is defined as monotonic and meeting the input slew rate specifications of the device. When no writes were
previously in progress on the bus, DQS will be transitioning from Hi-Z to logic LOW. If a previous write was in progress,
DQS could be HIGH, LOW, or transitioning from HIGH to LOW at this time, depending on
t
DQSS
.
9) The maximum limit for this parameter is not a device limit. The device operates with a greater value for this parameter, but
system performance (bus turnaround) degrades accordingly.
10) Fast slew rate
≥
1.0 V/ns , slow slew rate
≥
0.5 V/ns and < 1 V/ns for command/address and CK & CK slew rate > 1.0 V/ns,
measured between
V
OH(ac)
and
V
OL(ac)
.
11) For each of the terms, if not already an integer, round to the next highest integer.
t
CK
is equal to the actual system clock
cycle time.
12) A maximum of eight Autorefresh commands can be posted to any given DDR SDRAM device.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS64D16301GU-8-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS64D32000GU-8-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS72D32000GU-8-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS64D64020GU-8-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS72D64020GU-8-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72D64020GU-8-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?512MB (64Mx72) PC1600 2-bank? |
| HYS72D64020GU-8-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS72D64300 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Registered Double Data Rate SDRAM Module |
| HYS72D64300GBR-5-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184 - Pin Registered Double Data Rate SDRAM Modules |
| HYS72D64300GBR-5-C | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184-Pin Registered Double Data Rate SDRAM Module |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。