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參數(shù)資料
| 型號： | IA59032-CPGA100M |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 75K |
| 代理商： | IA59032-CPGA100M |
Page 8 of 17
Data Sheet
IA59032
32-Bit High Speed Microprocessor Slice
Copyright
2000
innov
ASIC
[_________
The End of Obsolescence
FUNCTIONAL TABLES
TABLE 1: ALU SOURCE OPERAND CONTROL
TABLE 2: ALU FUNCTION CONTROL
TABLE 3: ALU DESTINATION CONTROL
*X Don’t care
B=Register addressed by B inputs
DOWN is toward LSB, UP is toward MSB
I
2
L
L
L
L
H
H
H
H
I
1
L
L
H
H
L
L
H
H
I
0
L
H
L
H
L
H
L
H
OCT AL CODE
0
1
2
3
4
5
6
7
R
A
A
0
0
0
D
D
D
S
Q
B
Q
B
A
A
Q
0
AQ
AB
ZQ
ZB
ZA
DA
DQ
DZ
MICRO CODE
AL U SOURCE OPE RANDS
MNE MONIC
I
5
L
L
L
L
H
H
H
H
I
4
L
L
H
H
L
L
H
H
I
3
L
H
L
H
L
H
L
H
OCTAL CODE
0
1
2
3
4
5
6
7
ADD
SUBR
SUBS
OR
AND
NOTRS
EXOR
EXNOR
R PLUS S
S MINUS R
R MINUS S
R OR S
R AND S
Rn AND S
R EX-OR S
R EX-NOR S
R+S
S-R
R-S
R \/ S
R /\ S
Rn /\ S
R \-/ S
(R \-/ S)n
SYMBOL
MICRO CODE
MNEMONIC
ALU FUNCTION
I
8
I
7
I
6
OCTAL CODE SHIFT
L
L
L
L
L
H
L
H L
L
H H
H L
L
H L
H
H H L
H H H
LOAD
NONE
NONE
F
→
B
F
→
B
SHIFT
NONE
X
X
X
LOAD
F
→
Q
NONE
NONE
NONE
Q/2
→
Q
NONE
2Q
→
Q
NONE
RAM
0
X
X
X
X
F
0
F
0
IN
0
IN
0
RAM
15
X
X
X
X
IN
15
IN
15
F
15
F
15
Q
0
X
X
X
X
Q
0
Q
0
IN
0
X
Q
15
X
X
X
X
IN
15
X
Q
15
Q
15
QREG
NOP
RAMA
RAMF
RAMQD
RAMD
RAMQU
RAMU
0
1
2
3
4
5
6
7
X
X
F
F
A
F
F
F
F
F
NONE
NONE
DOWN F/2
→
B DOWN
DOWN F/2
→
B
UP
2F
→
B
UP
2F
→
B
X
UP
X
RAM SHIFT'R
Q SHIFT'R
MNEMONIC
MICRO CODE
RAM FUNCT'N Q REG FUNCT'N
Y OUTPUT
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