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PowerPC 405GP Embedded Processor Data Sheet
6/20/03
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause
permanent damage to the device
Characteristic
Symbol
Value
Unit
Supply Voltage (Internal Logic)
VDD
0 to +2.7
V
Supply Voltage (I/O Interface)
OVDD
0 to +3.6
V
PLL Supply Voltage
AVDD
0 to +2.7
V
Input Voltage (2.5 V CMOS receivers)
VIN
-0.6 to VDD + 0.6
V
Input Voltage (3.3 V LVTTL receivers)
VIN
-0.6 to OVDD + 0.6
V
Input Voltage (5.0 V LVTTL receivers)
VIN
-0.6 to OVDD + 2.4
V
Storage Temperature Range
TSTG
-55 to +150
°C
Case temperature under bias
TC
-40 to +120
°C
Note: All specified voltages are with respect to GND.
Package Thermal Specifications
The PPC405GP is designed to operate within a case temperature range of -40°C to +85°C. Thermal resistance values for
the E-PBGA packages in a convection environment are as follows:
Package—Thermal Resistance
Symbol
Airflow
ft/min (m/sec)
Unit
0 (0)
100 (0.51)
200 (1.02)
35 mm, 456-balls—Junction-to-Case
θ
JC
222
°C/W
35mm, 456-balls—Case-to-Ambient1
θ
CA
14
13
12
°C/W
27 mm, 456-balls—Junction-to-Case
θ
JC
222
°C/W
27mm, 456-balls—Case-to-Ambient1
θ
CA
18
16
15
°C/W
25 mm, 413-balls—Junction-to-Case
θ
JC
1.5
°C/W
25mm, 413-balls—Case-to-Ambient1
θ
CA
17
15
13
°C/W
Note:
1. For a chip mounted on a JEDEC 2S2P card without a heat sink.
2. For a chip mounted on a card with at least one signal and two power planes, the following relationships exist:
a. Case temperature, TC, is measured at top center of case surface with device soldered to circuit board.
b. TA = TC – P×θCA, where TA is ambient temperature and P is power consumption.
c. TCMax = TJMax – P×θJC, where TJMax is maximum junction temperature and P is power consumption.