參數(shù)資料
型號(hào): IC41C4105-50T
英文描述: 1Mx4 bit Dynamic RAM with Fast Page Mode
中文描述: 1Mx4位動(dòng)態(tài)RAM的快速頁面模式
文件頁數(shù): 8/17頁
文件大小: 510K
代理商: IC41C4105-50T
IC41C4105 and IC41LV4105
8
Integrated Circuit Solution Inc.
DR019-0A 08/01/2001
AC CHARACTERISTICS
(Continued)
(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
-35
-
50
-
60
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Units
t
ACH
Column-Address Setup Time to
CAS
Precharge during WRITE Cycle
OE
Hold Time from
WE
during
READ-MODIFY-WRITE cycle
(18)
Data-In Setup Time
(15, 22)
Data-In Hold Time
(15, 22)
READ-MODIFY-WRITE Cycle Time
RAS
to
WE
Delay Time during
READ-MODIFY-WRITE Cycle
(14)
CAS
to
WE
Delay Time
(14, 20)
Column-Address to
WE
Delay Time
(14)
Fast Page Mode READ or WRITE
Cycle Time
Fast Page Mode
RAS
Pulse Width
Access Time from
CAS
Precharge
(15)
Fast Page Mode READ-WRITE Cycle Time
Output Buffer Turn-Off Delay from
CAS
or
RAS
(13,15,19, 24)
CAS
Setup Time (CBR REFRESH)
(20, 25)
CAS
Hold Time (CBR REFRESH)
( 21, 25)
OE
Setup Time prior to
RAS
during
HIDDEN REFRESH Cycle
Auto Refresh Period 1,024 Cycles
Transition Time (Rise or Fall)
(2, 3)
15
15
15
ns
t
OEH
8
10
15
ns
t
DS
t
DH
t
RWC
t
RWD
0
6
80
45
0
8
0
10
140
80
ns
ns
ns
ns
125
70
t
CWD
t
AWD
t
PC
25
30
12
34
42
20
36
49
25
ns
ns
ns
t
RASP
t
CPA
t
PRWC
t
OFF
35
-
40
3
100K
21
15
50
-
47
3
100K
27
15
60
-
56
3
100K
34
15
ns
ns
ns
ns
t
CSR
t
CHR
t
ORD
8
8
0
10
10
0
10
10
0
ns
ns
ns
t
REF
t
T
1
16
15
1
16
50
1
16
50
ms
ns
AC TEST CONDITIONS
Output load:
Two TTL Loads and 50 pF (Vcc = 5.0V + 10%)
One TTL Load and 50 pF (Vcc = 3.3V + 10%)
Input timing reference levels:
V
IH
= 2.4V, V
IL
= 0.8V (Vcc = 5.0V + 10%)
V
IH
= 2.4V, V
IL
= 0.8V (Vcc = 3.3V + 10%)
Output timing reference levels: V
OH
= 2.0V, V
OL
= 0.8V (Vcc = 5.0V + 10%, 3.3V + 10%)
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