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參數(shù)資料
| 型號(hào)： | IC42S16100-6T |
| 英文描述： | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 為512k × 16位× 2組（16兆）同步動(dòng)態(tài)RAM |
| 文件頁(yè)數(shù)： | 34/78頁(yè) |
| 文件大?。?/td> | 789K |
| 代理商： | IC42S16100-6T |
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IC42S16100
34
Integrated Circuit Solution Inc.
DR024-0D 06/25/2004
Burst Data Interruption U/LDQM Pins
(Write Cycle)
Burst data input can be temporarily interrupted (muted )
during a write cycle using the U/LDQM pins. Regardless
of the
CAS
latency, as soon as one of the U/LDQM pins
goes HIGH, the corresponding externally applied input
data will no longer be written to the device internal circuits.
Subsequently, the corresponding input continues to be
muted as long as that U/LDQM pin remains HIGH.
The IC42S16100 will revert to accepting input as soon as
Burst Read and Single Write
The burst read and single write mode is set up using the
mode register set command. During this operation, the
burst read cycle operates normally, but the write cycle only
writes a single data item for each write cycle. The
CAS
latency and DQM latency are the same as in normal mode.
that pin is dropped to LOW and data will be written to the
device. This input control operates independently on a
byte basis with the UDQM pin controlling upper byte input
(pin I/O8 to I/O15) and the LDQM pin controlling the lower
byte input (pins I/O0 to I/O7).
Since the U/LDQM pins control the device input buffers
only, the cycle continues internally and, inparticular,
incrementing of the internal burst counter continues.
WRITE A0
COMMAND
I/O
CLK
D
IN
A0
WRITE (CA=A, BANK 0)
WRITE A0
COMMAND
UDQM
LDQM
I/O8-I/O15
I/O0-I/O7
CLK
D
IN
A1
WRITE (CA=A, BANK 0)
DATA MASK (LOWER BYTE)
DATA MASK (UPPER BYTE)
t
DMD=0
D
IN
A2
D
IN
A3
D
IN
A0
D
IN
A3
Don’t Care
CAS
latency = 2, 3
CAS
latency = 2, burst length = 4
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PDF描述 |
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| IC42S16100-6TG | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TI | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TIG | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-7T | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-7TG | 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IC42S16100-6TG | 制造商:ICSI 制造商全稱(chēng):Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TI | 制造商:ICSI 制造商全稱(chēng):Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-6TIG | 制造商:ICSI 制造商全稱(chēng):Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-7T | 制造商:ICSI 制造商全稱(chēng):Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16100-7TG | 制造商:ICSI 制造商全稱(chēng):Integrated Circuit Solution Inc 功能描述:512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
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