參數(shù)資料
型號(hào): ICM7243AIPL
廠商: INTERSIL CORP
元件分類: 顯示驅(qū)動(dòng)器
英文描述: 8-Character, Microprocessor- Compatible, LED Display Decoder Driver
中文描述: LED DISPLAY DRIVER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 6/12頁
文件大小: 109K
代理商: ICM7243AIPL
9-26
Performance Curves
FIGURE 4. SEGMENT CURRENT vs OUTPUT VOLTAGE
FIGURE 5. CHARACTER CURRENT VS OUPUT VOLTAGE
30
20
10
0
1
2
3
I
S
SEGMENT VOLTAGE (V)
V
DD
= 5.5V
4.5V
5.0V
0
I
C
V
DD
= 5.5V
4.5V
5.0V
0
1
2
3
SEGMENT VOLTAGE (V)
100
200
300
400
500
Pin Descriptions
SIGNAL
PIN
FUNCTION
ICM7243A(B)
D0 - D5
10 - 15
(8 - 13)
Six-Bit ASCll Data input pins (active high).
CS, CS
16
(14 - 16)
Chip Select from
μ
P address decoder, etc.
WR
17
WRite pulse input pin (active low). For an active high write pulse, CS can be used, and WR can be
used as CS.
MODE
31
Selects data entry MODE. High selects
Sequential Access (SA)
mode where first entry is
displayed in “l(fā)eftmost” character and subsequent entries appear to the “right”. Low selects the
Random Access (RA)
mode where data is displayed on the character addressed via A0 - A2
Address pins.
A0/SEN
30
In
RA
mode it is the LSB of the character Address. In
SA
mode it is used for cascading devices for
displays of more than 8 characters (active high enables device controller).
A1/CLeaR
29
In
RA
mode this is the second bit of the address. In
SA
mode, a low input will CLeaR the Serial
Address Counter, the Data Memory and the display.
A2/DISPlay
FULL
28
In
RA
mode this is the MSB of the Address. In
SA
mode, the output goes high after eight entries,
indicating DISPlay FULL.
OSC/OFF
27
OSCillator input pin. Adding capacitance to V
DD
will lower the internal oscillator frequency. An
external oscillator can be applied to this pin. A low at this input sets the device into a (shutdown)
mode, shutting OFF the display and oscillator but retaining data stored in memory.
SEG a - SEG m,
DP
2 - 9, 32 - 40
(2 - 7), (32 - 40)
SEGment driver outputs.
CHARacter 1 - 8
18 - 21,
23 - 26
CHARacter driver outputs.
ICM7243
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