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參數(shù)資料
| 型號： | ICS1572 |
| 英文描述： | GT 7C 7#16S SKT RECP WALL RM |
| 中文描述： | 用戶可編程的差分輸出圖形時鐘發(fā)生器 |
| 文件頁數(shù)： | 18/19頁 |
| 文件大?。?/td> | 276K |
| 代理商： | ICS1572 |
The
ICS1572
is incapable of sourcing current, so V
ih
must be
set by the ratios of these resistors for each of these lines. R1
and R2 are electrically in parallel from an AC standpoint
because V
dd
is bypassed to ground through bypass-capacitor
network C
b
. If we picked a target impedance of 75
for our
transmission line impedance, a value of 91
for R1 and R1’
and a value of 430
for R2 and R2’ would yield a Thevinin
equivalent characteristic impedance of 75.1W and a Vih value
of VAA-.873 Volts, a margin of 0.127Volts. This may be
adequate; however, at higher frequencies one must contend
with the 10 pF input capacitance of the RAMDAC. Values of
82
for R1 and R1’ and 820
for R2 and R2’ would give us a
characteristic impedance of 74.5
and a V
ih
value of V
AA
-.45.
With a .55 Volt margin on V
ih
, this voltage level might be safer.
To set a value for V
il
, we must determine a value for I
prg
that
will cause the output FET’s to sink an appropriate current. We
desire V
il
to be V
AA
-1.6 or greater. V
AA
-2 would seem to be a
safe value. Setting up a sink current of 25 milliamperes would
guarantee this through our 82
pull-up resistors. As this is
controlled by a 4/1 current mirror, 7 mA into I
prg
should set this
current properly. A 510
resistor from V
dd
to I
prg
should work
fine.
Resistors Rt and Rt’ are shown as series terminating resistors
at the
ICS1572
end of the transmission lines. These are not
required for operation, but may be useful for meeting EMI
requirements. Their intent is to interact with the input capaci-
tance of the RAMDAC and the distributed capacitance of the
transmission line to soften up rise and fall times and conse-
quently cut some of the high-order harmonic content that is
more likely to radiate RF energy. In actual usage they would
most likely be 10 to 20
resistors or possibly ferrite beads.
C
b
is shown as multiple capacitors. Typically, a 22
μ
F tantalum
should be used with separate .1
μ
F and 220pf capacitors placed
as close to the pins as possible. This provides low series
inductance capacitors right at the source of high frequency
energy. R
d
is used to isolate the circuitry from external sources
of noise. Five to ten ohms should be adequate.
Great care must be used when evaluating high frequency
circuits to achieve meaningful results. The 10 pf input capaci-
tance and long ground lead of an ordinary scope probe will
make any measurements made with it meaningless. A low
capacitance FET probe with a ground connection directly
connected to the shield at the tip will be required. A 1GHz
bandwidth scope will be barely adequate, try to find a faster
unit.
ICS1572 Application Note
ICS1572 Output Circuitry
18
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PDF描述 |
|---|---|
| ICS1572M-101 | GT 4C 4#12 PIN RECP WALL RM |
| ICS1572M-301 | GT 4C 4#12 SKT RECP WALL RM |
| ICS1574B | GT 5C 5#12 PIN RECP WALL RM |
| ICS1574BEB | GT 5C 5#12 SKT RECP WALL RM |
| ICS1574BM | GT 10C 10#16 PIN RECP WALL RM |
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參數(shù)描述 |
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| ICS1572M301 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator |
| ICS1572M-301 | 制造商:ICS 制造商全稱:ICS 功能描述:User Programmable Differential Output Graphics Clock Generator |
| ICS1574B | 制造商:ICS 制造商全稱:ICS 功能描述:User Programmable Laser Engine Pixel Clock Generator |
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