參數(shù)資料
型號: ICS1893BFLF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 72/133頁
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標準包裝: 30
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應商設備封裝: 48-SSOP
包裝: 管件
其它名稱: 1893BFLF
Chapter 6 Functional Blocks
ICS1893BF, Rev. F, 5/13/10
May, 2010
43
ICS1893BF Data Sheet Rev. F - Release
Copyright 2009, IDT, Inc.
All rights reserved.
When the 10Base-T link is:
Invalid, and the Smart Squelch function is:
– Disabled (bit 18.0 is logic one), the Link Monitor Function must detect at least one of the following
events before transitioning its link from the invalid state to the valid state:
More than seven, ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data
– Enabled (bit 18.0 is logic zero), the Link Monitor Function must detect at least one of the following
events before transitioning its link from the invalid state to the valid state:
More than seven, ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data followed by a valid IDL
Valid, and the Smart Squelch function is:
– Disabled (bit 18.0 is logic one), the Link Monitor Function continues to report its link as valid as long
as it continues to detect any of the following:
ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data
– Enabled (bit 18.0 is logic zero), the Link Monitor Function continues to report its link as valid as long
as it continues to detect any of the following:
ISO/IEC-defined, Normal Link Pulses (NLPs)
Any valid data followed by a valid IDL
Valid, the Link Monitor Function declares the link as invalid if it receives neither data nor NLPs (that is,
the link shows either no activity or inconsistent activity) for more than 81 to 83 ms. In this case the Link
Monitor Function sets the Link Status bit to logic zero.
Note:
1. An ICS1893BF receives ‘valid data’ when its Twisted-Pair Receiver phase-locked loop can acquire lock
and extract the receive clock from the incoming data stream for a minimum of three consecutive bit
times.
2. When a link is invalid and the Link Monitor Function detects the presence of data, the ICS1893BF does
not transition the link to the valid state until after the reception of the present packet is complete.
3. Enabling or disabling the Smart Squelch Function affects the Link Monitor function.
4. A transition from the invalid state to the valid state does not automatically update the latching-low Link
Status bit.
6.5.6 10Base-T Operation: Smart Squelch
The Smart Squelch Function imposes more stringent requirements on the Link Monitor Function regarding
the definition of a valid link, thereby providing a level of insurance that spurious noise is not mistaken for a
valid link during cable installation.
An STA can control the execution of the ICS1893BF Smart Squelch Function using bit 18.0 (the Smart
Squelch Inhibit bit in the 10Base-T Operations Register). When bit 18.0 is logic:
Zero (the default), an ICS1893BF enables its Smart Squelch Function. In this case, the Link Monitor
must confirm the presence of both data and a valid IDL at the end of the packet before declaring a link
valid.
One, an ICS1893BF disables or inhibits its Smart Squelch Function. In this case, the Link Monitor does
not have to confirm the presence of an IDL to declare a link valid (that is, the reception of any data is
sufficient).
In 10Base-T mode, an ICS1893BF appends an IDL to the end of each packet during data transmission.
The receiving PHY (the remote link partner) sees this IDL and removes it from the data stream.
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ICS1893BKI 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR)
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