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參數資料
| 型號： | ICS810001BK-21 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 810001 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 封裝： | 5 X 5 MM, 0.95 MM HEIGHT, MO-220VHHD-2, VFQFN-32 |
| 文件頁數： | 9/22頁 |
| 文件大?。?/td> | 485K |
| 代理商： | ICS810001BK-21 |
810001BK-21
www.icst.com/products/hiperclocks.html
REV. A AUGUST 12, 2005
17
Integrated
Circuit
Systems, Inc.
ICS810001-21
FEMTOCLOCKSDUAL VCXO VIDEO PLL
PRELIMINARY
The example above will ensure a total pull range of ±113.25
ppm with an APR of ±58.25ppm. Many times, board designers
may select their own crystal based on their application. If the
application requires a tighter APR, a crystal with better pullability
FORMULAS
C
LOW =
(C
L1 + CS1 + CV_LOW) (CL2 + CS2 + CV_LOW)
(C
L1 + CS1 + CV_LOW) + (CL2 + CS2 + CV_LOW)
C
HIGH =
(C
L1 + CS1 + CV_HIGH (CL2 + CS2 + CV_HIGH)
(C
L1 + CS1 + CV_HIGH) + (CL2 + CS2 + CV_HIGH)
C
Low
is the effective capacitance due to the low varactor
capacitance, load capacitance and stray capacitance.
C
Low determines the high frequency component on the
TPR (Total Pull Range).
C
High
is the effective capacitance due to the high varactor
capacitance, load capacitance and stray capacitance.
C
High determines the low frequency component on the
TPR (Total Pull Range).
EXAMPLE CALCULATIONS
Using the tables and figures above, we can now calculate the
TPR and APR of the VCXO using the example crystal
parameters. For the numerical example below there were some
assumptions made. First, the stray capacitance (C
S1, CS2), which
is all the excess capacitance due to board parasitic, is 4pF.
Second, the expected lifetime of the project is 5 years; hence
the inaccuracy due to aging is ±15ppm. Third, though many
boards will not require load tuning capacitors (C
L1, CL2), it is
recommended for long-term consistent performance of the
system that two tuning capacitor pads be placed into every
design. Typical values for the load tuning capacitors will range
from 0 to 4pF.
AbsolutePullRange (APR) = TotalPullRange – (FrequencyTolerance + FrequencyStability + Aging)
TPR =
1
2 C
0/C1 (1+CLOW /C0)
1
2 C
0/C1 (1+CHIGH/C0)
– 106
()
C
LOW =
(0 + 4pF + 15.4pF) (0 + 4pF + 15.4pF)
(0 + 4pF + 15.4pF) + (0 + 4pF + 15.4pF)
= 9.7pF
C
HIGH =
(0 + 4pF + 29.6pF) (0 + 4pF + 29.6pF)
(0 + 4pF + 29.6pF) + (0 + 4pF + 29.6pF)
= 16.8pF
TPR = ±113.25ppm
APR = 113.25ppm – (20ppm + 20ppm + 15ppm) = ±58.25ppm
TPR =
1
2 220 (1+9.7pF/4pF)
1
2 220 (1+16.8pF/4pF)
– 106 = 226.5ppm
()
(C0/C1 ratio) can be used. Also, with the equations above, one
can vary the frequency tolerance, temperature stability, and
aging or shunt capacitance to achieve the required pullability.
ICS810001-21
FEMTOCLOCKS DUAL VCXO VIDEO PLL
TSD
IDT / ICS FEMTOCLOCKS DUAL VCXO VIDEO PLL
ICS810001-21
17
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相關代理商/技術參數 |
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|---|---|
| ICS810001BK-21T | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS-TM DUAL VCXO VIDEO PLL |
| ICS810001BK-22LF | 功能描述:IC CLK SYNC DL VCXO PLL 32 VFQFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:HiPerClockS™, FemtoClock™ 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數:- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS810001BK-22LFT | 功能描述:IC CLK SYNC DL VCXO PLL 32 VFQFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:HiPerClockS™, FemtoClock™ 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數:- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS810001DK-21LF | 功能描述:IC CLK GEN SYNC VCXO DL 32VFQFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:HiPerClockS™, FemtoClock™ 標準包裝:1 系列:- 類型:時鐘/頻率發(fā)生器，多路復用器 PLL:是 主要目的:存儲器，RDRAM 輸入:晶體 輸出:LVCMOS 電路數:1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6 |
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