IDT / ICS LVCMOS/LVTTL ZERO DELAY CLOCK BUFFER
6
ICS86004 REV B JUNE 21, 2006
ICS86004
15.625MHZ TO 62.5MHZ, 1:4 LVCMOS/LVTTL ZERO DELAY CLOCK BUFFER
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
CYCLE-TO-CYCLE JITTER
OUTPUT SKEW
tjit(cc) = tcycle n –tcycle n+1
1000 Cycles
Q0:Q3
V
DDO
2
V
DDO
2
V
DDO
2
tcycle n
tcycle n+1
tsk(o)
V
DDO
2
V
DDO
2
Qy
Qx
STATIC PHASE OFFSET
(where
t () is any random sample, and t() mean is the average
of the sampled cycles measured on controlled edges)
t () mean = Static Phase Offset
t()
V
DD
2
V
DD
2
CLK
FB_IN
PARAMETER MEASUREMENT INFORMATION
2.5VCORE/ 2.5V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
LVCMOS
1.25V±5%
-1.25V±5%
V
DD,
V
DDA, VDDO
GND
SCOPE
Qx
LVCMOS
1.65V±5%
-1.65V±5%
SCOPE
Qx
LVCMOS
V
DDO
2
1.25V±5%
-1.25V±5%
V
DD,
V
DDA, VDDO
GND
V
DD,
V
DDA
GND
V
DDO
2.05V±5%