參數(shù)資料
型號: ICS840004BGI-01LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 1/18頁
文件大小: 0K
描述: IC FREQ SYNTHESIZER 20TSSOP
標準包裝: 2,500
系列: HiPerClockS™, FemtoClock™
類型: 頻率合成器
PLL: 帶旁路
輸入: LVCMOS,LVTTL,晶體
輸出: LVCMOS,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 2:4
差分 - 輸入:輸出: 無/無
頻率 - 最大: 156.25MHz
除法器/乘法器: 是/無
電源電壓: 2.375 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 20-TSSOP
包裝: 帶卷 (TR)
FEMTOCLOCK CRYSTAL-TO-LVCMOS/LVTTL
FREQUENCY SYNTHESIZER
ICS840004I-01
IDT / ICS LVCMOS/LVTTL FREQUENCY SYNTHESIZER
1
ICS840004BGI-01 REV. C FEBRUARY 9, 2009
General Description
The ICS840004I-01 is a 4 output LVCMOS/LVTTL
Synthesizer optimized to generate Ethernet
reference clock frequencies and is a member of the
HiPerClocksTM family of high performance clock
solutions from IDT. Using a 25MHz, 18pF parallel
resonant crystal, the following frequencies can be generated
based on the 2 frequency select pins (F_SEL1:0): 156.25MHz,
125MHz, and 62.5MHz. The ICS840004I-01 uses IDT’s 3rd
generation low phase noise VCO technology and can achieve 1ps
or lower typical random rms phase jitter, easily meeting Ethernet
jitter requirements. The ICS840004I-01 is packaged in a small
20-pin TSSOP package.
Features
Four single-ended LVCMOS/LVTTL outputs
17
typical output impedance
Selectable crystal oscillator interface or single-ended input,
Supports the following output frequencies: 156.25MHz,
125MHz and 62.5MHz
VCO range: 560MHz - 700MHz
RMS phase jitter at 156.25MHz (1.875MHz – 20MHz):
0.52ps (typical)
Output supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Frequency Select Function Table for Ethernet Frequencies
HiPerClockS
ICS
Inputs
Output Frequency (MHz), (25MHz Reference)
F_SEL1
F_SEL0
M Div. Value
N Div. Value
M/N Ratio Value
0
25
4
6.25
156.25
0
1
25
5
125
1
0
25
10
2.5
62.5
1
25
5
125 (default)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
nc
VDDA
nPLL_SEL
MR
OE
REF_CLK
nXTAL_SEL
nc
F_SEL0
VDD
F_SEL1
GND
Q0
Q1
VDDO
Q2
Q3
GND
XTAL_IN
XTAL_OUT
OSC
Phase
Detector
VCO
M = ÷25 (fixed)
F_SEL1:0
0 0 ÷4
0 1 ÷5
1 0 ÷10
1 1 ÷5 (default)
0
1
0
2
N
Q0
Q1
Q2
Q3
OE
F_SEL1:0
nPLL_SEL
nXTAL_SEL
REF_CLK
MR
XTAL_IN
XTAL_OUT
Pullup
Pulldown
25MHz
Pullup:Pullup
ICS840004I-01
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm
package body
G Package
Top View
Pin Assignment
Block Diagram
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