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參數(shù)資料
| 型號(hào)： | ICS8422002AGILFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 15/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTHESIZER LVHSTL 20-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | HiPerClockS™, FemtoClock™ |
| 類型： | 頻率合成器 |
| PLL： | 帶旁路 |
| 輸入： | LVCMOS，LVTTL，晶體 |
| 輸出： | LVHSTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 無(wú)/是 |
| 頻率 - 最大： | 226.66MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 8422002AGILFT |
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ICS8422002AGI REVISION A AUGUST 12, 2009
8
2009 Integrated Device Technology, Inc.
ICS8422002I Data Sheet
FEMTOCLOCK CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER
Parameter Measurement Information, continued
Output Crossover Voltage
Application Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perform- ance,
power supply isolation is required. The ICS8422002I provides
separate power supplies to isolate any high switching noise from the
outputs to the internal PLL. VDD, VDDA and VDDO should be
individually connected to the power supply plane through vias, and
0.01F bypass capacitors should be used for each pin. Figure 1
illustrates this for a generic VDD pin and also shows that VDDA
requires that an additional 10
resistor along with a 10F bypass
capacitor be connected to the VDDA pin.
Figure 1. Power Supply Filtering
Recommendations for Unused Input and Output Pins
Inputs:
LVCMOS Control Pins
All control pins have internal pulldowns; additional resistance is not
required but can be added for additional protection. A 1k
resistor
can be used.
Crystal Inputs
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
resistor can be tied from
XTAL_IN to ground.
REF_CLK Input
For applications not requiring the use of the reference clock, it can be
left floating. Though not required, but for additional protection, a 1k
resistor can be tied from the REF_CLK to ground.
Outputs:
LVHSTL Outputs
All unused LVHSTL outputs can be left floating. We recommend that
there is no trace attached. Both sides of the differential output pair
should either be left floating or terminated.
V OX
Q0,
Q1
nQ0,
nQ1
VDD
VDDA
3.3V or 2.5V
10
10F
.01F
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相關(guān)代理商/技術(shù)參數(shù) |
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| ICS8422002AGIT | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8422002I | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8422002I-01 | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8422004-01I | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8422004AGI | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS? LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
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