IDT / ICS 2.5V LVPECL FREQUENCY SYNTHESIZ" />
參數(shù)資料
型號: ICS843001AKI-40LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 17/18頁
文件大?。?/td> 0K
描述: IC SYNTHESIZER LVPECL 16-VFQFPN
標準包裝: 2,500
系列: HiPerClockS™, FemtoClock™
類型: 頻率合成器
PLL:
輸入: 晶體
輸出: LVCMOS,LVPECL,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/是
頻率 - 最大: 106.25MHz
除法器/乘法器: 無/無
電源電壓: 2.375 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應商設備封裝: 16-VFQFPN(3x3)
包裝: 帶卷 (TR)
其它名稱: 843001AKI-40LFT
IDT / ICS 2.5V LVPECL FREQUENCY SYNTHESIZER
8
ICS843001AK-40 REV. A OCTOBER 10, 2007
ICS843001-40
FEMTOCLOCKS CRYSTAL-TO-2.5V LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843001-40 provides
separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V
CC, VCCA, VCCO_LVPECL and
V
CCO_REF_OUT should be individually connected to the power sup-
ply plane through vias, and bypass capacitors should be used
for each pin. To achieve optimum jitter performance, power
supply isolation is required. Figure 1 illustrates how a 10
Ω re-
sistor along with a 10
μF and a 0.01μF bypass capacitor should
be connected to each V
CCA pin.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10
Ω
V
CCA
10
μF
.01
μF
2.5V
.01
μF
V
CC
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUT
All unused LVCMOS output can be left floating. There should be
no trace attached.
LVPECL OUTPUT
All unused LVPECL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
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