IDT / ICS 2.5V LVPECL FREQUENCY SYNTHESIZER
9
ICS843001AK-40 REV. A OCTOBER 10, 2007
ICS843001-40
FEMTOCLOCKS CRYSTAL-TO-2.5V LVPECL FREQUENCY SYNTHESIZER
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram is
shown in Figure 3. The XTAL_OUT pin can be left floating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it is
recommended that the amplitude be reduced from full swing to
half swing in order to prevent signal interference with the power
rail and to reduce noise. This configuration requires that the output
FIGURE 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
impedance of the driver (Ro) plus the series resistance (Rs) equals
the transmission line impedance. In addition, matched termination
at the crystal input will attenuate the signal in half. This can be
done in one of two ways. First, R1 and R2 in parallel should equal
the transmission line impedance. For most 50
Ω applications, R1
and R2 can be 100
Ω. This can also be accomplished by removing
R1 and making R2 50
Ω.
R2
Zo = 50
VDD
Ro
Zo = Ro + Rs
R1
VDD
XTAL_IN
XTAL_OUT
.1uf
Rs
FIGURE 2. CRYSTAL INPUt INTERFACE
CRYSTAL INPUT INTERFACE
The ICS843001-40 has been characterized with 10pF parallel
resonant crystals. The capacitor C1 and C2 are not required if a
10pF parallel resonant crystal is used. It is recommended to
provide these spare footprints if further frequency accuracy fine
tuning is needed.
C1
X1
Crystal
C2
XTAL_IN
XTAL_OUT