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參數(shù)資料
| 型號： | ICS8431AMI-21LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 350 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封裝： | 7.50 X 18.05 MM, 2.25 MM HEIGHT, ROHS COMPLIANT, MS-013, MO-119, SOIC-28 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 256K |
| 代理商： | ICS8431AMI-21LF |
8431AMI-21
www.icst.com/products/hiperclocks.html
REV. A AUGUST 2, 2005
2
Integrated
Circuit
Systems, Inc.
ICS8431I-21
350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-
TO
-3.3V LVPECL FREQUENCY SYNTHESIZER
The PLL loop divider or M divider is programmed by using
inputs M0 through M8. While the nP_LOAD input is held LOW,
the data present at M0:M8 is transparent to the M divider. On
the LOW-to-HIGH transition of nP_LOAD, the M0:M8 data is
latched into the M divider and any further changes at the
M0:M8 inputs will not be seen by the M divider until the next
LOW transition on nP_LOAD.
The relationship between the VCO frequency, the crystal fre-
quency and the M divider is defined as follows:
The M value and the required values of M0:M8 for programming
the VCO are shown in
Table 3B, Programmable VCO Frequency
Function Table. The frequency out is defined as follows:
For the ICS8431I-21, the output divider may be set to either
÷2 or ÷4 by the DIV_SEL pin. For an input of 16 MHz, valid
M values for which the PLL will achieve lock are defined as:
250
≤ M ≤ 511.
FUNCTIONAL DESCRIPTION
The ICS8431I-21 features a fully integrated PLL and therefore
requires no external components for setting the loop bandwidth.
The output of the oscillator is divided by 16 prior to the phase
detector. With a 16MHz crystal this provides a 1MHz reference
frequency.The VCO of the PLL operates over a range of 250MHz
to 700MHz.The output of the M divider is also applied to the phase
detector.
The phase detector and the M divider force the VCO output
frequency to be M times the reference frequency by adjusting
the VCO control voltage. Note that for some values of M (ei-
ther too high or too low), the PLL will not achieve lock. The
output of the VCO is scaled by a divider prior to being sent to
the LVPECL output buffer. The divider provides a 50% output
duty cycle.
The programmable features of the ICS8431I-21 support four
output operational modes and a programmable M divider and
output divider. The four output operational modes are spread
spectrum clocking (SSC), non-spread spectrum clock and
two test modes and are controlled by the SSC_CTL[1:0] pins.
16
M
fVCO =
fxtal x
N
FOUT =
fVCO
=
16 x N
fxtal x M
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| ICS8431CM-11T | 255 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS8431CM-11LFT | 255 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS8431DMI-01 | 200 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS8431DMI-01LFT | 200 MHz, OTHER CLOCK GENERATOR, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS8431AMI-21LFT | 功能描述:IC SYNTHESIZER 350MHZ 28-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS8431AMI-21T | 制造商:ICS 制造商全稱:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8431CM-01 | 制造商:ICS 制造商全稱:ICS 功能描述:200MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER |
| ICS8431CM-01T | 制造商:ICS 制造商全稱:ICS 功能描述:200MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER |
| ICS8431CM-11 | 制造商:ICS 制造商全稱:ICS 功能描述:255MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER |
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