IDT / ICS 700MHZ, 3.3V LVPECL FREQUENCY S" />
參數(shù)資料
型號: ICS8432DYI-101LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 4/20頁
文件大?。?/td> 0K
描述: IC SYNTHESIZER 700MHZ 32-LQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: HiPerClockS™
類型: 頻率合成器
PLL: 帶旁路
輸入: HCSL,LVDS,LVHSTL,LVPECL,SSTL
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 700MHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 帶卷 (TR)
其它名稱: 8432DYI-101LFT
IDT / ICS 700MHZ, 3.3V LVPECL FREQUENCY SYNTHESIZER
12
ICS8432DYI-101 REV. C APRIL 10, 2007
ICS8432I-101
700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
LAYOUT GUIDELINE
The schematic of the ICS8432I-101 layout example used in
this layout guideline is shown in Figure 6A. The ICS8432I-101
recommended PCB board layout for this example is shown in
Figure 6B. This layout example is used as a general guideline.
FIGURE 6A. SCHEMATIC OF RECOMMENDED LAYOUT
The layout in the actual system will depend on the selected
component types, the density of the components, the density
of the traces, and the stack up of the P.C. board.
C16
10u
Termination A
U1
8432-101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
32
31
30
29
28
27
26
25
M5
M6
M7
M8
N0
N1
nc
VEE
TEST
VDD
FOUT1/2
nFOUT1/2
VCCO
FOUT
nFOUT
VEE
MR
S_CLOCK
S_DATA
S_LOAD
VDDA
nCLK_SEL
REF_IN
CLK
M4
M3
M2
M1
M0
VCO_SEL
nP_LOAD
nCLK
R1
125
VCCA
TL2
Zo = 50 Ohm
TEST
IN-
VCC
S_CLOCK
VCC
R3
125
C11
0.01u
XTAL_SEL
R3
50
S_LOAD
R7
10
TL1
Zo = 50 Ohm
MR
IN+
R4
84
FOUT
R2
84
S_DATA
R1
50
C15
0.1u
nCLK
CLK
VCC
IN+
Termination B
(not shown in
the layout)
FOUTN
R2
50
C14
0.1u
VCC
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