參數(shù)資料
型號: ICS8735AY-31LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 7/21頁
文件大小: 0K
描述: IC CLK GEN ZD 1:5 LVPECL 32-LQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: HiPerClockS™
類型: 時鐘發(fā)生器
PLL: 帶旁路
輸入: HCSL,LVDS,LVHSTL,LVPECL,SSTL
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:5
差分 - 輸入:輸出: 是/是
頻率 - 最大: 350MHz
除法器/乘法器: 是/是
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 帶卷 (TR)
其它名稱: 8735AY-31LFT
ICS8735-31
1:5, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR
IDT / ICS 3.3V LVPECL ZERO DELAY CLOCK GENERATOR
15
ICS8735AY-31 REV. B FEBRUARY 18, 2009
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8735-31.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS8735-31 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * ICC_MAX = 3.465V * 150mA = 519.75mW
Power (outputs)MAX = 30mW/Loaded output pair
If all outputs are loaded, the total power is 5 * 30mW = 150mW
Total Power_MAX = (3.465V, with all outputs switching) = 519.75mW + 150mW = 669.75mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow
and a multi-layer board, the appropriate value is 42.1°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.670W * 42.1°C/W = 98.2°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (multi-layer).
Table 7. Thermal Resistance θJA for 32 Lead LQFP, Forced Convection
θ
JA vs. Air Flow
Linear Feet per Minute
0200
500
Single-Layer PCB, JEDEC Standard Test Boards
67.8°C/W
55.9°C/W
50.1°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
47.9°C/W
42.1°C/W
39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
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