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| 型號(hào)： | ICS879893BYIT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 879893 SERIES, PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-48 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 233K |
| 代理商： | ICS879893BYIT |
Integrated
Circuit
Systems, Inc.
879893BYI
www.icst.com/products/hiperclocks.html
REV. A JULY 12, 2005
12
ICS879893BI
LOW SKEW, 1-TO-12 (IDCS)
LVCMOS/LVTTL CLOCK GENERATOR
PRELIMINARY
INPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating. Though
not required, but for additional protection, a 1k
Ω resister can be
tied from XTAL_IN to ground.
CLK INPUT:
For applications not requiring the use of the test clock, it can be
left floating.Though not required, but for additional protection, a
1k
Ω resister can be tied from the CLK input to ground.
TEST CLK INPUT:
For applications not requiring the use of the test clock, it can be
left floating.Though not required, but for additional protection, a
1k
Ω resister can be tied from the TEST_CLK to ground.
CLK/nCLK INPUT:
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required,
but for additional protection, a 1k
Ω resister can be tied from CLK
to ground.
PCLK/nPCLK INPUT:
For applications not requiring the use of a differential input, both
the PCLK and nPCLK pins can be left floating. Though not
required, but for additional protection, a 1k
Ω resister can be tied
from PCLK to ground.
SELECT PINS:
All select pins have internal pull-ups and pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resister can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating.We recommend
that there is no trace attached.
LVPECL OUTPUT
All unused LVPECL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential
output pair should either be left floating or terminated.
LVHSTL OUTPUT
All unused LVHSTL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential
output pair should either be left floating or terminated
LVDS OUTPUT
All unused LVDS outputs should be terminated with 100
Ω resister
between the differential pair.
LVDS – Like OUTPUT
All unused LVDS outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential
output pair should either be left floating or terminated.
HCSL OUTPUT
All unused HCSL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential
output pair should either be left floating or terminated
SSTL OUTPUT
All unused SSTL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential
output pair should either be left floating or terminated
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