參數(shù)資料
型號(hào): ICS9248YG-50LF-T
廠(chǎng)商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 時(shí)鐘產(chǎn)生/分配
英文描述: 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
封裝: 6.10 MM, 0.65 MM PITCH, TSSOP-28
文件頁(yè)數(shù): 11/11頁(yè)
文件大小: 261K
代理商: ICS9248YG-50LF-T
9
ICS9248-50
General Layout Precautions:
1) Use a ground plane on the top layer of the
PCB in all areas not used by traces.
2) Make all power traces and vias as wide as
possible to lower inductance.
Notes:
1 All clock outputs should have series
terminating resistor. Not shown in
all places to improve readibility of
diagram
2 Optional EMI capacitor should be
used on all CPU, SDRAM, and PCI
outputs.
3 Optional crystal load capacitors are
recommended.
Capacitor Values:
C1, C2 : Crystal load values determined by user
All unmarked capacitors are 0.01F ceramic
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