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參數資料
| 型號： | ICS9250F-29-T |
| 英文描述： | Peripheral IC |
| 中文描述： | 外圍芯片 |
| 文件頁數： | 2/12頁 |
| 文件大?。?/td> | 471K |
| 代理商： | ICS9250F-29-T |
ICS9248-126
Third party brands and names are the property of their respective owners.
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General Description
Power Groups
3++4-564-57&7'
3++,6,,895,,8
3+++46+4:!88
3++.6.;<';<
3++8,=6,=,8
Pin Configuration
PIN NUMBER
1, 6, 15, 19, 27, 30,
36, 42
PIN NAME
TYPE
DESCRIPTION
VDD
PWR
3.3V Power supply for SDRAM output buffers, PCI output buffers,
reference output buffers and 48MHz output
14.318 MHz reference clock.
Frequency select pin.
REF0
FS3
OUT
IN
3, 10, 16, 22,
33, 39, 44
4
5
GND
PWR
Ground pin for 3V outputs.
X1
X2
FS1
IN
OUT
IN
OUT
IN
OUT
OUT
Crystal input,nominally 14.318MHz.
Crystal output, nominally 14.318MHz.
Frequency select pin.
PCI clock outputs.
Frequency select pin.
PCI clock outputs.
PCI clock outputs.
PCICLK0
FS2
PCICLK1
PCICLK (6:2)
14, 13, 12, 11, 9
41, 40, 38, 37, 35,
34, 32, 31, 29, 28,
21, 20, 18, 17
SDRAM (13:0)
OUT
SDRAM clock outputs
23
24
SDATA
SCLK
CPU2.5_3.3#
24_48MHz
FS0
48MHz
CPUCLK (2:0)
VDDLCPU
REF1
I/O
IN
IN
OUT
IN
OUT
OUT
PWR
OUT
Data pin for I
2
C circuitry 5V tolerant
Clock input of I2C input, 5V tolerant input
Voltage select 2.5V when high - 3.3V when low
Clock output for super I/O/USB default is 24MHz
Frequency select pin.
48MHz output clock
CPU clock outputs.
Power pin for the CPUCLKs. 2.5V
14.318 MHz reference clock.
43, 45, 46
47
48
26
2
7
8
25
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ICS9250YF-08 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator & Integrated Buffers for Celeron & PII/III⑩ |
| ICS9250YF-09-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Timing Generator for PENTIUM II Systems |
| ICS9250YF-10 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Timing Generator for Pentium II Systems |
| ICS9250YF-11-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Timing Generator for PENTIUM II/III Systems |
| ICS9250YF-12-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Timing Generator for PENTIUM II/III Systems |
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