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參數(shù)資料
| 型號： | ICS93718yFT |
| 英文描述： | DDR and SDRAM Buffer |
| 中文描述： | DDR和SDRAM緩沖區(qū) |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 104K |
| 代理商： | ICS93718YFT |
4
ICS93718
0434D—10/10/03
Recommended Operating Condition
SEL_DDR=0 SDRAM Outputs V
DD
=3.3V
, T
A
= 0 - 85°C; (unless otherwise stated)
PARAMETER
SYMBOL
V
DD3.3_2.5
V
DD2.5
Input High Voltage
V
IH
SEL_DDR, PD# input
Input Low Voltage
V
IL
SEL_DDR, PD# input
CONDITIONS
MIN
3.0
2.3
2.0
TYP
3.3
2.5
MAX
3.6
2.7
UNITS
V
0.8
V
Input voltage level
V
IN
V
DD
V
1
Guaranteed by design, not 100% tested in production.
V
Power Supply Voltage
Absolute Maximum Ratings
Supply Voltage (VDD & VDD2.5) . . . . . . . . . -0.5V to 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +85°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
SEL_DDR = 0 SDRAM Outputs
V
DD
= 3.3V, T
A
= 0 - 85°C; (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
Input High Current
I
IH
V
I
= V
DD
or GND
Input Low Current
I
IL
V
I
=
V
DD
or GND
I
DD3.3_2.5
C
L
= 0pf, 133MHz
I
DD2.5
C
L
= 0pf, 133MHz
I
DDPD
C
L
= 0pf, all frequencies
Output High Current
I
OH
V
DD
=
3.3V
,
V
OUT
= 1V
Output Low Current
I
OL
V
DD
= 3.3V
,
V
OUT
= 1.2V
V
DD
= 3.3V,
V
OH
= -12mA
V
DD
= 3.3V
I
OH
= 12mA
Input Capacitance
1
C
IN
V
I
=
GND or V
DD
1
Guaranteed by design, not 100% tested in production.
MIN
TYP
1
-20
200
100
3
-74
42
MAX
10
UNITS
μA
μA
mA
mA
mA
mA
mA
-100
250
200
10
-18
26
2
pF
V
Low-level output voltage
V
OL
0.4
0.35
2.95
Operating Supply Current
High-level output voltage
V
OH
2
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| ICS93722 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Cost DDR Phase Lock Loop Zero Delay Buffer |
| ICS93722CFLF | 功能描述:IC DDR PLL ZD BUFFER 28-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS93722CFLFT | 功能描述:IC DDR PLL ZD BUFFER 28-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS93722YFLFT | 制造商:ICS 制造商全稱:ICS 功能描述:Low Cost DDR Phase Lock Loop Zero Delay Buffer |
| ICS93725 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR and SDRAM Zero Delay Buffer |
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