- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360786 > ICS950818 Frequency Generator with 200MHz Differential CPU Clocks PDF資料下載
參數(shù)資料
| 型號： | ICS950818 |
| 英文描述： | Frequency Generator with 200MHz Differential CPU Clocks |
| 中文描述： | 頻率發(fā)生器200MHz的CPU的時鐘差分 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大小： | 165K |
| 代理商： | ICS950818 |
16
ICS950818
0825F—11/19/03
The impact of asserting the PCI_STOP# signal will be the following. All PCI[10:0] and stoppable PCI_F clocks will latch
low in their next high to low transition. The PCI_STOP# setup time tsu is 10 ns, for transitions to be recognized by the
next rising edge.
Assertion of PCI_STOP# Waveforms
PCI_STOP# - Assertion (transition from logic "1" to logic "0")
CPU_STOP# - Assertion (transition from logic "1" to logic "0")
Assertion of CPU_STOP# Waveforms
CPU_STOP# Functionality
#
P
O
T
S
_
U
P
C
T
U
P
C
C
U
P
C
1
l
m
r
N
l
m
r
N
0
t
M
*
f
t
o
The impact of asserting the CPU_STOP# pin is all CPU outputs that are set in the SMBus configuration to be stoppable
via assertion of CPU_STOP# are to be stopped after their next transition. When the SMBus Bit 6 of Byte 1 is
programmed to '0' the final state of the stopped CPU signals is CPU = High and CPU# = Low. There is to be no change
to the output drive current values. The CPU will be driven high with a current value equal to (Mult 0 'select') x (Iref), the
CPU# signal will not be driven . When the SMBus Bit 6 of Byte 1 is programmed to '1' then final state of the stopped
CPU signals is Low, both CPU and CPU# outputs will not be driven.
CPU_STOP#
CPUCLKT
CPUCLKC
Group to Group Skews at Common Transition Edges: Unbuffered Mode
GROUP
SYMBOL
3V66 to PCI
1,2
S
3V66-PCI
3V66 (4:1) leads 33MHz PCI
1
Guaranteed by design, not 100% tested in production.
2
500ps Tolerance
CONDITIONS
MIN
1.5
TYP
2.765
MAX
3.5
UNITS
ns
PCI_STOP#
PCI_F 33MHz
PCI 33MHz
tsu
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS950901 | Programmable Timing Control Hub for P4 |
| ICS950901YFLFT | TRIMMER, 500K |
| ICS950902YGLF-T | Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950902 | Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950902YFLF-T | Programmable Timing Control Hub⑩ for P4⑩ |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS950818YG-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950901 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for P4 |
| ICS950901YFLFT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for P4 |
| ICS950902 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950902DFLF | 功能描述:IC PC MAIN CLOCK 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。