- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67708 > ICS952621YFLF-T (INTEGRATED DEVICE TECHNOLOGY INC) 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | ICS952621YFLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | LEAD FREE, MO-118, SSOP-48 |
| 文件頁數(shù)： | 2/17頁 |
| 文件大?。?/td> | 155K |
| 代理商： | ICS952621YFLF-T |
10
Integrated
Circuit
Systems, Inc.
ICS952621
0756C—04/19/05
I
2C Table: Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
48MHz_USB
2x output drive
0=2x drive
RW
2x drive
1xdrive
1
Bit 6
48MHz_USB
Output Control
RW
Disable
Enable
1
Bit 5
RESERVED
-
X
Bit 4
RESERVED
-
X
Bit 3
RESERVED
-
X
Bit 2
PCICLK_F2
Output Control
RW
stoppable
Free-run
1
Bit 1
PCICLK_F1
Output Control
RW
stoppable
Free-run
1
Bit 0
PCICLK_F0
Output Control
RW
stoppable
Free-run
1
I
2C Table: Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
DOT_48MHZ
Output Control
RW
Disable
Enable
1
Bit 6
CPU_T/C_ITP
Output Control
RW
Disable
Enable
1
Bit 5
3V66_3/VCH
Frequency Select
Output Select
RW
3V66
VCH
0
Bit 4
3V66_3/VCH
Frequency Select
Output Control
RW
Disable
Enable
1
Bit 3
RESERVED
-
X
Bit 2
3V66_2
Output Control
RW
Disable
Enable
1
Bit 1
3V66_1
Output Control
RW
Disable
Enable
1
Bit 0
3V66_0
Output Control
RW
Disable
Enable
1
I
2C Table: Output Control and Fix Frequecy Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
Test Clock Mode
-
Disable
Enable
0
Bit 6
RESERVED
-
0
Bit 5
CPU *2 Test Clock
FS_A and FS_B
Operation
-
Normal
Test Mode
0
Bit 4
SRC Frequency Select
SRC Frequency
Select
-
100MHz
200MHz
0
Bit 3
Spread Spectrum Type
Down/Center
-
Down
Center
0
Bit 2
Spread Spectrum Mode
Spread Spectrum
Enable
Spread
OFF
Spread
ON
0
Bit 1
REF1
Output Control
RW
Disable
Enable
1
Bit 0
REF0
Output Control
RW
Disable
Enable
1
I
2C Table: Vendor & Revision ID Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
RID3
R
-
0
Bit 6
RID2
R
-
0
Bit 5
RID1
R
-
0
Bit 4
RID0
R
-
0
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
RESERVED
Byte 5
Byte 4
Byte 6
Byte 7
-
REVISION ID
-
VENDOR ID
-
RESERVED
相關PDF資料 |
PDF描述 |
|---|---|
| ICS952621YGLF-T | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS952623YGLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| ICS952624YFLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS952702YFLFT | 222 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS952702YFT | 222 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS952623 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor |
| ICS952623YFT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor |
| ICS952623YGT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor |
| ICS952702 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for K7 System |
| ICS952702YFLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for K7 System |
發(fā)布緊急采購，3分鐘左右您將得到回復。