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參數(shù)資料
| 型號： | ICS952621YFLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | LEAD FREE, MO-118, SSOP-48 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大小： | 155K |
| 代理商： | ICS952621YFLF-T |
16
Integrated
Circuit
Systems, Inc.
ICS952621
0756C—04/19/05
Ordering Information
ICS952621yGLF-T
Example:
Designation for tape and reel packaging
Annealed Lead Free (Optional)
Package Type
G = TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type
Prefix
ICS = Standard Device
ICS XXXX y G LF- T
MIN
MAX
MIN
MAX
A
--
1.20
--
.047
A1
0.05
0.15
.002
.006
A2
0.80
1.05
.032
.041
b
0.17
0.27
.007
.011
c
0.09
0.20
.0035
.008
D
E
E1
6.00
6.20
.236
.244
e
L
0.45
0.75
.018
.030
N
a
0°
8°0°8°
aaa
--
0.10
--
.004
VARIATIONS
MIN
MAX
MIN
MAX
48
12.40
12.60
.488
.496
10-0039
N
D mm.
D (inch)
Ref erence Doc.: JEDEC Publicat ion 95, M O-153
0.50 BASIC
0.020 BASIC
SEE VARIATIONS
8.10 BASIC
0.319 BASIC
6.10 mm. Body, 0.50 mm. Pitch TSSOP
(240 mil)
(20 mil)
SYMBOL
In Millimeters
In Inches
COMMON DIMENSIONS COMMON DIMENSIONS
INDEX
AREA
INDEX
AREA
12
1 2
N
D
E1
E
SEATING
PLANE
SEATING
PLANE
A1
A
A2
e
-C-
b
c
L
aaa C
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