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參數(shù)資料
| 型號(hào)： | ICSSSTUB32871AzLFT |
| 英文描述： | 27-Bit Registered Buffer for DDR2 |
| 中文描述： | 27位注冊(cè)緩沖DDR2內(nèi)存 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 213K |
| 代理商： | ICSSSTUB32871AZLFT |
14
1186G—04/16/07
ICSSSTUB32871A
Notes: 1. C
L
includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR
≤
10MHz, Z
O
=
50
Ω
, input slew rate = 1 V/ns ±20% (unless otherwise specified).
C
L
= 10 pF
(see Note 1)
LOAD CIRCUIT – HIGH-TO-LOW SLEW-RATE MEASUREMENT
Test Point
DUT
Out
dt_f
V
OL
V
OH
VOLTAGE WAVEFORMS – HIGH-TO-LOW SLEW-RATE MEASUREMENT
80%
Output
20%
dv_f
R
L
= 50
Ω
C
L
= 10 pF
(see Note 1)
LOAD CIRCUIT – LOW-TO-HIGH SLEW-RATE MEASUREMENT
Test Point
DUT
Out
dt_r
V
OL
V
OH
VOLTAGE WAVEFORMS – LOW-TO-HIGH SLEW-RATE MEASUREMENT
80%
Output
20%
dv_r
R
L
= 50
Ω
V
DD
Figure 7 Output Slew-Rate Measurement Information (V = 1.8±
—
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PDF描述 |
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| ICSSSTUB32871AzT | 27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32872A | 28-Bit Registered Buffer for DDR2 |
| ICSSSTUBF32866A | 25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUBF32866Az(LF)T | 25-Bit Configurable Registered Buffer for DDR2 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICSSSTUB32871AZT | 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32872A | 制造商:ICS 制造商全稱:ICS 功能描述:28-Bit Registered Buffer for DDR2 |
| ICSSSTUBF32866A | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUBF32866AZ(LF)T | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUF32864A | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
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