參數(shù)資料
型號(hào)： ICX202
廠商： Sony Corporation
英文描述： Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
中文描述： 時(shí)序發(fā)生器和幀讀出CCD圖像傳感器信號(hào)處理器
文件頁數(shù)： 12/49頁
文件大?。?/td> 403K
代理商： ICX202
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CXD3410GA
Serial interface clock output variation characteristics
Normally, the serial interface data is loaded to the CXD3410GA at the timing shown in "Serial interface clock
internal loading characteristics (1)" above. However, one exception to this is when the data such as STB is
loaded to the CXD3410GA and controlled at the rising edge of SEN1. See "Description of Operation".
0.8V
DD
d
SEN1
Output signal
tpdPULSE
Symbol
tpdPULSE
Definition
Output signal delay, activated by the rising edge of SEN1
Min.
Typ.
Max.
100
5
Unit
ns
(Within the recommended operating conditions)
Serial interface clock internal loading characteristics (2)
th1
Enlarged view
0.2V
DD
d
ts1
0.2V
DD
d
VD
HD
VD
HD
SEN1
0.8V
DD
d
Example: During frame mode
Symbol
t
s1
t
h1
Definition
SEN1 setup time, activated by the falling edge of VD
SEN1 hold time, activated by the falling edge of VD
Min.
Typ.
Max.
0
200
Unit
ns
ns
Be sure to maintain a constantly high SEN1 logic level near the falling edge of VD.
(Within the recommended operating conditions)
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