參數(shù)資料
型號(hào)： ICX202
廠商： Sony Corporation
英文描述： Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
中文描述： 時(shí)序發(fā)生器和幀讀出CCD圖像傳感器信號(hào)處理器
文件頁(yè)數(shù)： 45/49頁(yè)
文件大小： 403K
代理商： ICX202
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45
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CXD3410GA
Detailed Description of Each Data
Shared data: D01 to D03 CTG [Category]
Of the data provided to the CXD3410GA by the CCD signal processor block serial interface, the CXD3410GA
loads D04 and subsequent data to each data register as shown in the table below according to the combination
of D01 to D03 .
PGA gain setting data: D06 to D15 GAIN [PGA gain]
The CXD3410GA can set the programmable gain amplifier (PGA) gain from
–
6dB to +42dB in 1024 steps by
using PGA gain setting data D06 to D15 GAIN.
The PGA gain setting data is expressed as shown in the table below using D06 to D15 GAIN.
D01
0
0
0
0
1
D02
0
0
1
1
X
D03
0
1
0
1
X
Description of operation
Loading to standby control data register
Loading to PGA gain setting data register
Loading to OB clamp level setting data register
Loading to input pulse polarity setting data register
Access prohibited
Standby control data: D15 STB [Standby]
The operating mode of the CCD signal processor block is switched as follows. When the CCD signal processor
block is in standby mode, only the serial interface is valid.
D15
0
1
Description of operation
Normal operating mode
Standby mode
MSB
LSB
D06
D07
D08
D09
D10
D11
D12
D13
D14
D15
1
1
0
0
↓
C
0
1
↓
1
0
0
1
1
↓
3
GAIN is expressed as 1C3h .
For example, when GAIN is set to "000h", "080h", "220h", "348h" and "3FFh", the respective PGA gain setting
values are
–
6dB, 0dB, +20dB, +34dB and +42dB.
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