參數(shù)資料
型號: ICX412AQF
廠商: Sony Corporation
英文描述: Diagonal 8.933mm (Type 1/1.8) Frame Readout CCD Image Sensor with a Square Pixel for Color Cameras
中文描述: 對角線8.933毫米(類型1/1.8)幀CCD圖像傳感器讀出一個彩色像素相機(jī)廣場
文件頁數(shù): 40/46頁
文件大?。?/td> 383K
代理商: ICX412AQF
40
CXD3412GA
CCD Signal Processor Block Serial Interface Control
The CXD3412GA's CCD signal processor block basically loads the CCD signal processor block serial interface
data sent in the following format at the rising edge of SEN2, and the setting values are then reflected to the
operation 6 ADCLKI clocks after that.
CCD signal processor block serial interface control requires clock input to ADCLKI in order to load and reflect
the serial interface data to operation, so this should normally be performed when the timing generator block is
in the normal operation mode.
There are four categories of CCD signal processor block serial interface data: standby control data, PGA gain
setting data, OB clamp level setting data, and input pulse polarity setting data.
Note that when data from multiple categories is loaded consecutively, the data for the category loaded last is
valid and data from other categories is lost. When transferring data from multiple categories, raise SEN2 for
each category and wait until the setting value 6 ADCKLI clocks after that has been reflected to operation, then
transmit the next category.
The detail of each data are described below.
Standby Control Data
Data
D00
D01
to
D03
D04
to
D14
D15
Symbol
TEST
CTG
FIXED
STB
Function
Test code
Category switching
Standby control
Data = 0
Data = 1
Standby mode
Normal operation mode
Set to 0.
D01 to D03 CTG
Set to All 0.
Data
D00
D01
to
D03
D04,
D05
D06
to
D15
Symbol
TEST
CTG
FIXED
GAIN
Function
Test code
Category switching
PGA gain setting data
Data = 0
Data = 1
Set to 0.
D01 to D03 CTG
Set to All 0.
See D06 to D15 GAIN.
PGA Gain Setting Data
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
SSI2
SCK2
SEN2
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