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參數(shù)資料
| 型號： | ICX412AQF |
| 廠商： | Sony Corporation |
| 英文描述： | Diagonal 8.933mm (Type 1/1.8) Frame Readout CCD Image Sensor with a Square Pixel for Color Cameras |
| 中文描述： | 對角線8.933毫米（類型1/1.8）幀CCD圖像傳感器讀出一個彩色像素相機廣場 |
| 文件頁數(shù)： | 42/46頁 |
| 文件大?。?/td> | 383K |
| 代理商： | ICX412AQF |
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CXD3412GA
Detailed Description of Each Data
Shared data: D01 to D03 CTG [Category]
Of the data provided to the CXD3412GA by the CCD signal processor block serial interface, the CXD3412GA
loads D04 and subsequent data to each data register as shown in the table below according to the
combination of D01 to D03 .
Standby control data: D15 STB [Standby]
The operating mode of the CCD signal processor block is switched as follows. When the CCD signal processor
block is in standby mode, only the serial interface is valid.
PGA gain setting data: D06 to D15 GAIN [PGA gain]
The CXD3412GA can set the programmable gain amplifier (PGA) gain from
–
6dB to +42dB in 1024 steps by
using PGA gain setting data D06 to D15 GAIN.
The PGA gain setting data is expressed as shown in the table below using D06 to D15 GAIN.
For example, when GAIN is set to "000h", "080h", "220h", "348h" and "3FFh", the respective PGA gain setting
values are
–
6dB, 0dB, +20dB, +34dB and +42dB.
MSB
D06
0
D07
1
D08
1
D09
1
D10
0
D11
0
D12
0
D13
0
D14
1
D15
1
LSB
↓
1
↓
C
↓
3
GAIN is expressed as 1C3h .
D00
0
1
Description of operation
Normal operating mode
Standby mode
D01
0
0
0
0
1
D02
0
0
1
1
X
Description of operation
Loading to standby control data register
Loading to PGA gain setting data register
Loading to OB clamp level setting data register
Loading to input pulse polarity setting data register
Access prohibited
D03
0
1
0
1
X
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