- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383098 > ID82C52 (INTERSIL CORP) CMOS Serial Controller Interface PDF資料下載
參數(shù)資料
| 型號： | ID82C52 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS Serial Controller Interface |
| 中文描述： | 1 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, CDIP28 |
| 封裝： | CERAMIC, DIP-28 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大小： | 255K |
| 代理商： | ID82C52 |
5-13
UART Timing Characterization
All parameters listed in this table were laboratory bench characterized at room temperature on a small sample of parts. No guarantee is implied. The main intent
here is to clarify functional operation of the 82C52.
82C52 UART Timing
Characterized with IX = External Clock
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
(15)
TS1
CO(IX) Delay from IX
-
30
ns
BRSR Bit D7 = 0
(IX Output)
(16)
TS2
CO (BRG) Delay from IX
-
80
ns
BRSR Bit D7 = 1
(BRG Output)
(17)
TCY
CO (BRG) Clock Cycle Time
62.5
-
ns
BRSR Bit D7 = 1
(BRG Output), Note 1
(18)
TDTX
SDO Delay from CO(BRG) Low
-
30
ns
Note 2
(19)
TWLTL
WR Low to TBRE Low
-
50
ns
Note 3
(20)
TCLTH
CO (BRG) Low to TBRE HIgh
-
50
ns
Notes 3, 4
(21)
TIHF
INTR High on Flag
-
50
ns
Note 5A, 5B
(22)
TIHM
INTR High on MS
-
50
ns
Note 5
(23)
TRLIL
RD Low to INTR Low
-
60
ns
(24)
TCTHX
CTS High to Disable Transmit
4TCY + 10
-
ns
TBR Full, Note 6
(25)
TDRH
CO (BRG) Low to DR High
-
40
ns
Note 7
(26)
TRLDL
RD Low to DR Low
-
50
ns
Note 7
(27)
TWHO
WR High to RTS/DTR Active
-
50
ns
NOTES:
1. Prescaler rate of divide by 1, Divisor Select rate of “external” (divide by 1). The Baud Rate Clock (CO-BRG) operates at 16 times the
user programmed bit rate. For example, at 1200 baud: TCY = 1/(16 x 1200) = 52.1
μ
s.
2. A.
With TR (Transmitter Register) initially empty, TDTX occurs from the 5th falling edge of CO(BRG) after WR goes high.
B. With TR initially full, TDTX occurs from the trailing edge of the 16th CO(BRG) in the last Stop bit provided WR went high by the
trailing edge of the 12th CO(BRG) in the last Stop bit.
C. With CTS high (disable transmit) and TBR full, TDTX occurs from the 5th falling edge of CO(BRG) after CTS goes low.
3. TBRE bit D6 in USR is updated each time TBRE changes state.
4. A.
With TR initially empty, TCLTH(TBRE) occurs from the 4th falling edge of CO(BRG) after WR goes high.
B. With TR initially full, TCLTH(TBRE) occurs from the trailing edge of the 15th CO(BRG) in the last Stop bit provided WR went high
by the trailing edge of the 12th CO(BRG) in the last Stop bit.
C. With CTS high (disable transmit) and TBR full, TCLTH(TBRE) occurs from the 4th falling edge of CO(BRG) after CTS goes low.
5. A.
INT on TC: INTEN enabled; USR bit D5(TC) is updated at this time regardless of interrupt configuration.
- INT on TC occurs from the trailing edge of the 11th CO(BRG) in the last Stop bit if TBR empty at that time.
B. INTR on receive flags OE, FE, PE, and RBRK: INTEN enabled; Respective USR bits updated at this time regardless of interrupt
configuration.
- INT on OE, FE, PE, RBRK occurs from the trailing edge of the 11th CO(BRG) in the last Stop bit. To avoid OE, RD(RBR) must
go low by the trailing edge of the 8th CO(BRG) in the last Stop bit.
C. INTR on MS: INTEN and MIEN enabled; USR bit D4(MS) is updated at this time regardless of INTEN/MIEN.
- INTR on MS occurs whenever CTS or DSR input changes state.
6. TCTHX is time before end of last Stop bit by which CTS must be inactive (high) to prevent transmission of the character waiting in TBR.
7. DR bit D7 in USR is updated each time DR changes state. TDRH always from trailing edge of 11th CO(BRG) in last Stop bit.
82C52
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ID82C54 | CMOS Programmable Interval Timer |
| ID82C54-10 | CMOS Programmable Interval Timer |
| ID82C54-12 | CMOS Programmable Interval Timer |
| ID82C59A | CMOS Priority Interrupt Controller |
| ID82C59A-5 | CMOS Priority Interrupt Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ID82C52/+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UART |
| ID82C54 | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 PERIPH PRG-CNTR 5V 8MHZ 24CDIP IND RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| ID82C54/+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Timer Circuit |
| ID82C54-10 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable Interval Timer |
| ID82C54-12 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable Interval Timer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。