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參數(shù)資料
| 型號： | IDT54FCT2573CTSOB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CAP 0.047UF 50V 10% X7R SMD-1206 TR-7-PL SN-NIBAR |
| 中文描述： | 快速CMOS八路透明鎖存 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 182K |
| 代理商： | IDT54FCT2573CTSOB |
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.12
3
DEFINITION OF FUNCTIONAL TERMS
FUNCTION TABLE (373 and 573)
(1)
FUNCTION TABLE (533)
(1)
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
V
TERM(2)
Terminal Voltage
with Respect to
GND
V
TERM(3)
Terminal Voltage
with Respect to
GND
T
A
Operating
Temperature
T
BIAS
Temperature
Under Bias
T
STG
Storage
Temperature
P
T
Power Dissipation
CAPACITANCE
(T
A
= +25
°
C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
Commercial
–0.5 to +7.0
Military
–0.5 to +7.0
Unit
V
–0.5 to
V
CC
+0.5
–0.5 to
V
CC
+0.5
V
0 to +70
–55 to +125
°
C
–55 to +125
–65 to +135
°
C
–55 to +125
–65 to +150
°
C
0.5
0.5
W
I
OUT
DC Output
Current
–60 to +120 –60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
2564 tbll 03
2564 lnk 04
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2564 tbl 02
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2564 tbl 01
Conditions
V
IN
= 0V
Typ.
6
Max. Unit
10
pF
V
OUT
= 0V
8
12
pF
2564 lnk 05
Pin Names
D
N
LE
OE
Description
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
O
N
O
N
3-State Outputs
Complementary 3-State Outputs
Inputs
LE
H
H
X
Outputs
O
N
D
N
H
L
X
OE
L
L
H
L
H
Z
Inputs
LE
H
H
X
Outputs
O
N
H
L
Z
D
N
H
L
X
OE
L
L
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT54FCT2573DTD | FAST CMOS OCTAL TRANSPARENT LATCHES |
| IDT54FCT2573DTDB | FAST CMOS OCTAL TRANSPARENT LATCHES |
| IDT54FCT2573DTE | CAP 0.047UF 100V 20% X7R SMD-1206 TR-7-PL SN-NIBAR |
| IDT54FCT2573DTEB | FAST CMOS OCTAL TRANSPARENT LATCHES |
| IDT54FCT2573DTL | FAST CMOS OCTAL TRANSPARENT LATCHES |
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