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參數(shù)資料
| 型號(hào)： | IDT5T905PGGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 5T SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | GREEN, TSSOP-28 |
| 文件頁數(shù)： | 16/17頁 |
| 文件大?。?/td> | 108K |
| 代理商： | IDT5T905PGGI |
INDUSTRIALTEMPERATURERANGE
8
IDT5T905
2.5VSINGLEDATARATE1:5CLOCKBUFFERTERABUFFER
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR LVEPECL
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing(1)
732
mV
VX
Differential Input Signal Crossing Point(2)
1082
mV
VTHI
Input Timing Measurement Reference Level(3)
Crossing Point
V
tR, tF
Input Signal Edge Rate(4)
1
V/ns
NOTES:
1. The 732mV peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet
the VDIF (AC) specification under actual use conditions.
2. A 1082mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. For 2.5V LVTTL single-ended operation, the RxS pin is tied HIGH and
A/VREF is tied to GND.
3. VDIF specifies the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode
only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching
to a new state.
4. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
5. For single-ended operation, in differential mode,
A/VREF is tied to the DC voltage VREF.
6. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
7. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
8. Typical values are at VDD = 2.5V, VDDQ = VDD, +25°C ambient.
9. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input interface table should be
referenced.
10. For differential mode (RxS = LOW), A and
A/VREF must be at the opposite rail.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR 2.5V
LVTTL(1)
Symbol
Parameter
Test Conditions
Min.
Typ.(8)
Max
Unit
Input Characteristics
IIH
Input HIGH Current(10)
VDD = 2.6V
VI = VDDQ/GND
—
±5
μA
IIL
Input LOW Current(10)
VDD = 2.6V
VI = GND/VDDQ
——
±5
VIK
Clamp Diode Voltage
VDD = 2.4V, IIN = -18mA
—
- 0.7
- 1.2
V
VIN
DC Input Voltage
- 0.3
+3.6
V
Single-Ended Inputs(2)
VIH
DC Input HIGH
1.7
—
V
VIL
DC Input LOW
—
0.7
V
Differential Inputs
VDIF
DC Differential Voltage(3,9)
0.2
—
V
VCM
DC Common Mode Input Voltage(4,9)
1150
1250
1350
mV
VIH
DC Input HIGH(5,6,9)
VREF + 100
—
mV
VIL
DC Input LOW(5,7,9)
—VREF - 100
mV
VREF
Single-EndedReferenceVoltage(5,9)
—
1250
—
mV
Output Characteristics
VOH
Output HIGH Voltage
IOH = -12mA
VDDQ - 0.4
—
V
IOH = -100
μAVDDQ - 0.1
—
V
VOL
Output LOW Voltage
IOL = 12mA
—
0.4
V
IOL = 100
μA
—
0.1
V
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